A Ferroelectric Gate Field Effect Transistor with a ZnO/Pb(Zr,Ti)O3 Heterostructure Formed on a Silicon Substrate

Abstract

We have developed a ferroelectric gate field effect transistor (FeFET) with a stacked oxide structure of ZnO/Pb(Zr,Ti)O3 (PZT)/SrRuO3 (SRO) on a Pt/SiO2-coated silicon substrate. The PZT film which acted as a ferroelectric gate insulator was completely oriented in the (111) direction. The well oriented PZT film was realized by the insertion of the SRO layer, which electrically acted, together with the bottom Pt layer as a bottom gate electrode. In order to realize a sharp heterointerface of ZnO/PZT, we applied chemical–mechanical-polishing (CMP) to the PZT surface giving rise to a minimized surface roughness of less than 0.65 nm (rms). The ZnO film stacked on the smooth PZT surface exhibited a c-axis orientation. Subsequently, the source and drain electrodes of Pt/Ti were formed on the ZnO surface. With a drain-to-source voltage of 0.1 V, the conduction current through the ZnO/PZT heterointerface was characterized. A large on/off current ratio (Ion/Ioff) higher than 105 was obtained between the gate voltage conditions of +10 and -10 V owing to the polarization reversal of the PZT gate. Notably, the on/off ratio was stable for more than 105 s without the application of gate bias.