Abstract

In this paper, output capacitor-less low-dropout (LDO) regulator using active-feedback and current-reuse feedforward compensation (AFCFC) is presented. The open-loop transfer function was obtained using small-signal modeling. The stability of the proposed LDO was analyzed using pole-zero plots, and it was confirmed by simulations that the stability was ensured under the load current of 50 mA. The proposed compensation method increases gain-bandwidth product (GBW) and reduces the on-chip compensation capacitor. The proposed AFCFC technique was applied to a three-stage output capacitor-less LDO. The LDO has a GBW of 5.6 MHz with a small on-chip capacitor of 2.6 pF. Fast-transient time of 450 ns with low quiescent current of 65.8 μA was achieved. The LDO was fabricated in 130 nm CMOS process consuming 180 × 140 μm2 of the silicon area.

Highlights

  • The LDO was fabricated in 130 nm CMOS process consuming 180 × 140 μm2 of the silicon area

  • Development of miniature wireless communication chip has led to great development of mobile devices and internet of things (IoT) devices

  • Multi-stage amplifiers which are more than two-stages should be frequency compensated and various frequency compensation designing multi-stage amplifiers have been studied as whichmethods are morefor than two-stages should be frequency compensated and various frequency compensation methods for designing multi-stage amplifiers have been studied as shown in Miller compensation (NMC)

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Summary

Introduction

Development of miniature wireless communication chip has led to great development of mobile devices and internet of things (IoT) devices. The main design issues of the OCL-LDO are to increase power conversion efficiency, minimize dropout voltage, and reduce quiescent current without decreasing transient performance. For a heavy load current, a large pass transistor seems to be suitable for power efficiency by reducing dropout voltage. 2018, 11, 688 the parasitic capacitor of a large pass transistor can degrade the phase dropout voltage. The parasitic capacitor of a the large pass resistance transistor can degrade the phase margin significantly. Low quiescent current increases output of the LDO under light margin significantly. Integrated circuit (PMIC) with output capacitor-less low dropout regulator (OCL-LDO) scheme. In order to achieve high loop gain and excellent voltage regulation performance, usually a two-stage error amplifier is adopted. Since the power transistor is a common source amplifier for a small signal, to control output current.

Output
Analysis
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OCL-LDO
12. The second a cascode amplifier folded-cascode amplifier transistors
Implementation and Experimental Results
Conclusions capacitor-less
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