Abstract
Direct-write, electron beam lithography is used as part of an electron beam/optical lithographic, mix and match system for the CMOS Silicon-on-Sapphire process at RSRE. In particular, we have considered the definition of the polysilicon gate and gate interconnect layer using commercially available, negative tone resist materials. The characteristics of early, non-optimised CMOS-SOS devices with gate dimensions of 0.75 μm, defined using these techniques are included.
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