Abstract
Using a model of gate oxide short defects, previously developed and validated experimentally, we investigate the behavior of CMOS SRAM memories having this defect. Faulty behaviors caused by gate oxide shorts are characterized classifying those that may cause a logic malfunction and those that degrade the memory operation without causing a logic error. Merits of SRAM test algorithms to detect gate oxide shorts are analyzed, identifying which are effective in terms of coverage and test cost.
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