Abstract
In millimeter-wave devices, Fan-out Wafer Level Package for system integration is a popular trend to meet the requirements of high performance, small dimensions and low cost. Compared to conventional Fan-out Wafer Level Package with molding compound, embedded Silicon Fan-out (eSiFO) Wafer Level Package has become an attractive technology due to low cost, less warpage problem and fine-pitch redistribution layer (RDL) production capability. However, silicon substrate is usually of low resistivity, which limits the application of eSiFO technology in millimeter-wave field. Thus, high efficiency and low loss transmission line has become an important topic in eSiFO. In this paper, a design of coplanar waveguide (CPW) with shield line for eSiFO in millimeter-wave applications is proposed. Electrical modeling of transmission line structure was carried out by HFSS. The CPW with and without shield line were fabricated compatible with semiconductor processes. Measurement and test results shows the shield line can provide good impedance matching, suppress undesirable substrate loss, as well as decrease crosstalk from adjacent lines.
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