Abstract

In this research work, a n-type silicon tunneling field effect transistor (TFET) has been designed and investigation has been carried out on its performances by altering different device parameters such as gate insulator dielectric constant, channel thickness, gate geometry, and channel length. The performances have been evaluated based on subthreshold swing, threshold voltage and Ion/Ioff ratio of the devices. The goal is to find a device which would simultaneously have a low subthreshold swing (SS), low threshold voltage, and a high Ion/Ioff ratio. It has been observed that having a double gate, short channel length, high-k dielectric, and low channel thickness leads us towards a compact design and the device exhibits very promising values of the aforementioned performance criteria. The most attractive proposition about a TFET is its ability to have a subthreshold swing lower than 60 mV/dec which is the theoretical limit of a MOSFET. In this study, an optimized device is obtained which has a subthreshold swing (point) of around 26 mV/dec and an Ion/Ioff ratio in the order of 1013. In addition, an inverter has been designed using a n-type TFET and a resistor to show the potential of TFETs to be used in logic circuits.

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