Modeling and simulation of 2-D SixGe(1-x) source dual-gate pocket NTFET

Abstract

The energy consumed in computing one bit of information can be scaled down if the transistor can operate at low supply voltage (Vdd) and have low leakage current. Subthreshold swing (SS) value of 60 mV/dec at room temperature (T = 300 K) is the fundamental bottleneck of metal oxide semiconductor field effect transistor (MOSFET). Furthermore, due to short channel effects (SCEs), scaling down the physical size of the transistor leads in higher leakage current. Tunnel field effect transistor (TFET) is being extensively explored as the replacement of MOSFET. For future low-power battery-operated electronic products, TFET is a viable technology to replace CMOS. In this work, we have studied the electronic band structure of Si0.8Ge0.2 using the hybrid functional of density functional theory (DFT). Then using the concept of dual gate with top gate having two different gate metal, Si0.8Ge0.2 as source and counter doped pocket, we have developed n-type TFET (NTFET). Using the above device structure, the different device parameters are studied by performing modeling and simulations. It has been discovered that the device exhibits high on-current (Ion), low off-current (Ioff), low SS, low leakage current at various temperatures which also represents its thermal stability. Our study demonstrates that the proposed NTFET is having current ratio (Ion/Ioff) higher than 1012 for 0.5 V of Vdd. All the simulations are carried out in 2-D Synopsys sentaurus TCAD.