A comprehensive model of backgate impedance dispersions in GaAs isolation structures

Abstract

A comprehensive model explains low frequency reactive, resonant and negative resistance effects in backgate current flow in monolithic GaAs integrated circuits. In a sister paper experimental comparisons were made between structures prepared by MBE on undoped buffer layers at high and low temperatures and by ion implantation. The study employed GaAs MESFETs which were similarly prepared on the three substrates. These observations provide the basis for the model. In the case of the ion implanted and normally buffered structures the form of the susceptance frequency spectra depended on cathode size, dc bias and temperature and could include capacitive relaxation as well as inductive and capacitive behaviors separated by a resonance. The form of the variation of the conductance was closely associated and frequently included a frequency region within which there was negative small signal resistance. All of these effects have been explained in terms of electron trapping at trap planes located at the interface between the n-type active region and the isolation material. In the case of inductive and capacitive relaxations a single trapping process was sufficient but the negative resistance behavior makes the additional requirement that charge should be trapped sequentially at least twice. Mathematical modeling and computational simulations have been used to give support to the physical models. In the case of the ion implanted structures it was possible to demonstrate reasonable quantitative agreement between the model and experiment using trap DLTS data.