A comparative study on performance of junctionless Bulk SiGe and Si FinFET

Abstract

In this paper, the n-type and p-type SiGe junctionless bulk FinFET (SiGe JL-FinFET) with a high Ge mole fraction (xF>0.8) was studied for characteristics of a single device and the CMOS logic circuit using 3D numerical simulation. A comparison study between SiGe JL-FinFET and Si JL-FinFET under 1×1019 to 5×1019 doping concentrations. The SiGe JL-FinFET exhibits a 28% and 9% enhancement of hole and electron mobility, thus the saturation current, transconductance, intrinsic gain, and intrinsic delay are improved up to 38%, 26%, 45% and 27% in the SiGe-based device as compared to the Si-based device. Due to the higher mobility and lower gate capacitance of SiGe JL-FinFET, the rise time, fall time, propagation delay, and maximum operating frequency of the CMOS inverter are also improved up to 34%, 13%, 9%, and 20%, respectively, compared to their Si-based counterparts. This SiGe junctionless device has a simple fabrication process and improvements in analog and digital performance at the sub-5 nm technology node, making this device a promising architecture for high-performance CMOS logic applications.