A Combined Theoretical and Experimental Approach to Deduce the Role of Dielectric Layer on Interface Trap Density in Single Crystal Organic Field‐Effect Transistors

Abstract

AbstractA detailed understanding of charge transport at the interface is necessary to explore the potential of organic field‐effect transistors. This can be realized by adequately analyzing the trap states at the interface. In the present work, rubrene‐based organic field‐effect transistors have been fabricated with three different interfaces. The device properties are used along with a technology computer‐aided design to deduce the interface trap density quantitatively. The transfer characteristics are simulated using a double Gaussian density of states and fitted with experimental data by adding traps to the semiconductor dielectric interface. A typical transistor with SiO2 interface has shown an interface trap density of about ≈1016 cm−2, and it is reduced to 1014 cm−2 when poly(methyl)methacrylate or polystyrene is coated on SiO2 interface, attributed to the surface passivation. This approach provides a simple and accurate way to estimate the interfacial traps and offers the possibility to tune the device architecture and performance.