A CMOS low noise amplifier for 5 to 6 GHz wireless applications

Abstract

This work demonstrates the design of a wideband low noise amplifier in 0.13 um CMOS technology. Important design aspects and the influence of bandwidth improving circuit elements on various LNA performance parameters like gain, matching, noise figure, and stability are analyzed. Simulated and measured LNA results are presented. At the centre frequency of 5.5 GHz the measured LNA performance includes 13.5 dB gain, 3.9 dB noise figure, -9.5 dB and -13.5 dB of input and output return loss, and 1 dB gain compression point at - 8.5 dBm input power respectively. From 5 GHz to 6 GHz a gain drop of less than 1 dB and an average noise figure of 4 dB have been measured. Input referred 1 dB gain compression point better than -8.5 dBm is measured over the entire bandwidth. The LNA dissipates 14 mW from a 1.8 V power supply. Active chip area is 0.28 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .