Abstract

With the development of modern computers, the integration of chips is getting higher and higher, and as the computing power increases, the energy consumption of chips is also increasing. Therefore, designing and optimizing low-latency and low-energy chips are the goals of many researchers today. At the same time, 4-bit absolute value detector are one of the most basic and important circuits for data storage and processing in chips. This paper designs a 4-bit absolute value detector circuit using Complementary Metal Oxide Semiconductor (CMOS) transistors that can take the absolute value of the input 4-bit signed number and compare it with the threshold value. And it includes the design of its absolute value conversion module and comparator module. By optimizing the circuit structure, the number of logic gates is reduced. By calculating the minimum delay on the critical path, logic gate size and other parameters, the power consumption of the circuit is reduced by adjusting the delay. In conclusion, this paper research can help further optimize the development of chip design industry.

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