A 9.6-Gb/s HEMT ATM switch LSI with event-controlled FIFO

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An asynchronous-transfer-mode (ATM) switch LSI was designed for the broadband integrated services digital network (B-ISDN) and fabricated using 0.6- mu m high-electron-mobility-transistor (HEMT) technology. To enhance the high-speed performance of direct-coupled FET logic (DCFL), event-controlled logic was used instead of conventional static memory for the first-in first-out (FIFO) buffer circuit. The 4.8-mm*4.7-mm chip contains 7100 DCFL gates. The maximum operating frequency was 1.2 GHz at room temperature with a power dissipation of 3.7 W. The single-chip throughput was 9.6 Gb/s. An experimental 4-to-4 ATM switching module using 16 switch LSIs achieved a throughput of 38.4 Gb/s. >