A 55-GHz-Bandwidth Track-and-Hold Amplifier in 28-nm Low-Power CMOS

Abstract

This brief presents a 25-GS/s track-and-hold amplifier (THA) implemented in a 28-nm low-power digital CMOS process. Given the intrinsic low-pass behavior of the THA core, a frequency compensation technique is employed to improve the bandwidth by increasing the input amplitude for higher frequencies. This enhances the small-signal bandwidth by almost 30% to 70 GHz. Large-signal measurements show a 3-dB corner frequency of 55 GHz, which enables a performance sufficient for time-interleaved analog-to-digital converter systems operating above 100 GS/s. At a peak-to-peak input amplitude of 400 mV, the total harmonic distortion is −32 dB for a 50-GHz input signal at a dc power consumption of 73 mW.