A 38.5-fJ 14.4-ns Robust and Efficient Subthreshold-to-Suprathreshold Voltage-Level Shifter Comprising Logic Mismatch-Activated Current Control Circuit

Abstract

This brief presents a robust and energy-efficient voltage level shifter (VLS) for wide-range conversion from the subthreshold to the suprathreshold regime. The proposed VLS contains a new logic mismatch detection circuit to address the exist contention current of the conversion stage. A power reducer circuit is introduced to increase the drivability of pull-up and pulldown devices in linear and cut-off regions and further energyconsuming improvement. The proposed VLS is simulated using a 0.18-lm process, the minimal convertible voltage is 0.2 V (deep subthreshold region) for the input signal. Post-layout simulation considering process voltage temperature (PVT) variations proves the proposed VLS outperforms previous designs in several aspects. The results report the consuming energy of 38.5 fJ per transition, a static power of 73.4 pW, and a delay of 14.4 ns when converting range is 0.4 V to 1.8 V. The proposed VLS occupies a 59.98-lm2 silicon area.