A Novel Fast Power-Efficient Cascode Level-Shifter

Abstract

The Voltage scaling technique is widely used in recent digital systems to resolve power issues. In these systems, Level Shifters (LS) are essential to make a solid interface between different voltage domains. This article presents a fast power and area-efficient ultra-low voltage level shifter (LS) that facilitates a wide range of conversion from the deep sub-threshold region up to the super-threshold region. The proposed LS achieves better performance by combining cross-coupled and current mirror-based structures' advantages. In addition, the split-input inverter and current limiter techniques help to reduce static power efficiently. Assuming a conversion from 400 mV to 1.2 V at 1MHz frequency, simulation results show that compared to the prior work, the proposed LS consumes 66% less power while performing the conversion about 13% faster. Implemented in a 65 nm standard CMOS process, the proposed SA consists of 9 transistors and occupies approximately 6.1 um x 18.2 um of silicon area.