Abstract
This brief presents new design of subthreshold-level shifter capable of converting an input signal from subthreshold voltage of 0.1 V to above threshold voltage of 1.2 V. Level shifter (LS) circuit makes use of a self-controlled current limiter (feedback loop) for shifting the signal by detecting the output error. In addition, the proposed design has ample process-voltage-temperature (PVT) variation tolerance. Simulation results of subthreshold LS design in 65-nm CMOS technology, shows that the circuit can shift the signal with limited delay, static power and energy consumption. Modified Wilson current mirror (MWCM) LS design (extension) is also implemented in 65-nm technology, which shows much improvement in terms of delay, power, and energy consumption compared to subthreshold LS design.
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