Abstract
We propose a self-biased inverter-based amplifier for realizing a high-speed low-power second-order single-loop continuous-time bandpass delta-sigma modulator (CT-BP- ΔΣM). The design is amenable to nanoscale CMOS and exploits a single self-biased pseudo-differential inverter with a positive feedback to replace conventional op-amps used in an integrator configuration. The modulator also uses a 5-bit asynchronous successive approximation register (ASAR) quantizer. With a 30 MHz bandwidth at 400 MS/s sampling rate and 100 MHz intermediate frequency (IF), the modulator achieves 61 dB dynamic range (DR) and 58 dB SNDR while consuming 2.5 mW from a 1V supply. The core area in 28 nm LP CMOS is 0.04 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . A 38.6 fJ/conv.-step figure of merit is achieved.
Highlights
H IGH-SPEED, high-resolution and low-power analogto-digital converters (ADC) in low-voltage nanoscale CMOS are in great demand by modern broadband wireless communication systems and IOT applications [1]
Compared to [14], which proposes the fully differential inverter-based op-amp with extra circuits to bias common-mode output voltages and separate supply voltages for fine-tuning of the dc gain of the integrators (Q tuning), the proposed architecture eliminates the use of extra stages by employing a self-biasing technique [15], [16]
The architecture is configured as a low-pass filter (LPF) but it merges an high-pass filter (HPF) into its positive feedback to realize a high Q-factor resonator that allows optimizing the noise transfer function (NTF) zeros for a maximum SNR
Summary
H IGH-SPEED, high-resolution and low-power analogto-digital converters (ADC) in low-voltage nanoscale CMOS are in great demand by modern broadband wireless communication systems and IOT applications [1]. Reference [5] introduces a ring amplifier (RA) by employing stabilization techniques to overcome instability and performance issues due to the lack of periodic reset The goal of this brief is to implement the modulator with a single-stage op-amp to overcome the wasting of power and bandwidth of the prior-art solutions. We propose to replace the traditional resonator in the continuous-time bandpass delta-sigma modulator (CT-BP- M), as presented in [12], with a self-biased inverter-based resonator in order to significantly reduce the power and silicon area. Compared to [14], which proposes the fully differential inverter-based op-amp with extra circuits to bias common-mode output voltages and separate supply voltages for fine-tuning of the dc gain of the integrators (Q tuning), the proposed architecture eliminates the use of extra stages by employing a self-biasing technique [15], [16].
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