Abstract
This paper presents a low-power CMOS transconductance “ <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">gm</i> ” boosted common gate (CG) ultrawideband (UWB) low noise amplifier (LNA) architecture, operating in the 3-5 GHz range, employing current-reuse technique. This proposed UWB CG LNA utilizes a common source (CS) amplifier as the <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">gm</i> -boosting stage which shares the bias current with the CG amplifying stage. A detailed mathematical analysis of the LNA is carried out and the different design tradeoffs are analyzed. The LNA circuit was designed and fabricated using the 130-nm IBM CMOS process and it achieved input return loss (S <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sub> ) and output return loss (S <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">22</sub> ) variations of respectively - 8.4 to - 40 dB and - 14 to - 15 dB within the pass-band. The LNA exhibits almost flat forward power gain (S <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">21</sub> ) of 13 dB and a reverse isolation (S <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">12</sub> ) variation of -55 dB to -40 dB, along with a noise figure (NF) ranging between 3.5 and 4.5 dB. The complete circuit (with output buffer) draws only 3.4 mW from a 1 V supply voltage.
Published Version
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