Abstract
Computing-in-memory (CIM) suffers from remarkable area and performance costs from large memory cell and inefficient peripheral circuits for MLP acceleration. In this work, a 2D2R ReRAM CIM accelerator is proposed with circuit improvements for MLP in visual classification applications. The 2D2R ReRAM cell is organized as crossbar array for dense weight storage. The multi-level input circuit is proposed for high precision input with compensation for the nonlinearity of 2D2R cell. The successive-approximation output circuit is employed with all-0 detecting for fast and energy-efficient conversions. Besides, the weight-aware configurable computing is proposed to dynamically configure the input count for partial sum for improved performance. Compared with the traditional 2T2R cell, the area of 2D2R cell can be reduced by >85%. The accuracy of MNIST test set is 97.76% for the accuracy of 3b input, output and weight, and the energy efficiency can reach 174.5TOP/W under the working frequency of 200 MHz, realizing ∼2.6× improvement over previous work.
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