Abstract
A 4th-order 4-bit continuous-time delta-sigma modulator (CTDSM) employing single-amplifier biquad (SAB) based loop filter and an interpolating quantizer is presented. By adopting the SAB-based topology, the proposed loop filter achieves 4th-order noise shaping function with only two op-amps. Furthermore, the proposed twin-T SAB minimizes the latency of the excess loop delay (ELD) compensation path (s0) and 1st-order path (s−1), which achieves better system stability. A low-power interpolating flash quantizer with an embedded random-skip incremental data weighted averaging (RS-IDWA) function is also proposed to address the nonlinearity of the quantizer and feedback DACs. With this technique, signal-dependent harmonic tones induced by the conventional DWA are avoided. Fabricated in a 90-nm CMOS, the proposed CTDSM achieves a peak SNDR of 68 dB over 13-MHz signal bandwidth, while consuming 5.1 mW at 320-MHz sampling frequency. The FoM is 95 fJ/conv.-step.
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