A 12-bit CMOS current steering D/A converter with a fully differential voltage output

Abstract

This paper presents the design of a 12-bit 8MSamples/s (MSPS) current-steering digital-to-analog converter (DAC) using 0.13 μm CMOS technology. The proposed DAC has adopted a segmented architecture in order to achieve a minimized die area and optimized performance. The current steering network consists of binary weighted current sources for the 8 least significant bits (LSBs) and a unary current cell array for the 4 most significant bits (MSBs). A fully differential amplifier (FDA) is utilized in the design to provide differential voltage output, enable the DAC to work at ultra low supply voltages, and reduce harmonic distortion in the output. The simulation results of the extracted layout show a maximum INL and DNL of 0.17 LSB and 0.20 LSB, respectively. The mid-code glitch energy is 78 pV-s and the SFDR is 81.8 dB. The settling time of the DAC is 38.2 ns and the power consumption is 13.4 mW. The chip active area is 330 μm × 224 μm. The DAC performance has also been verified with a supply voltage down to as low as 0.72 V. To the best of our knowledge, this is the first demonstration of a DAC capable of working at such a low supply voltage. This DAC will be used in a bio-implantable system for medical applications.