A 1.8 V 15-bit 1 mW 2nd-order sigma-delta modulator

Abstract

Low-voltage low-power sigma-delta modulators provide a critical interface in portable mixed-signal electronic systems. This paper deals with the design and implementation of a low-voltage, low-power 2nd-order sigma-delta modulator operating from a single 1.8 V power supply using a conventional 3.3 V, double-poly, 0.35 μm CMOS process, based on fully-differential switched-capacitor techniques. All the circuit blocks are integrated on one chip, and the input common-mode voltage is set at mid-rail, resulting in low power dissipation, minimum off-chip components, and high efficiency, flexibility and compatibility. The design is useful for voice applications in personal communications systems supplied by two nickel-cadmium or alkaline batteries. The modulator exhibits a 15-bit dynamic range for a 7 kHz bandwidth, and a 14-bit dynamic range for a 20 kHz bandwidth at an oversampling frequency of 2.56 MHz. The peak SNDR reaches 62 dB. The complete 2nd-order modulator has a power dissipation of 0.99 mW, and occupies 0.31 mm2 die area excluding bonding pads.