Abstract
A high gain and stability, four-stage OTA with a linear transistor Q-factor modulation compensation (TQM) and a fast, power-constrained slew-rate enhancement (PC-SRE) is proposed for ADCs working under ultra-low supply voltage. A rail-to-rail input & output bulk-driven fully differential four-stage operational amplifier with proposed structure is also presented under 0.25 V supply voltage. By using proposed structure, the response speed and stability of designed four-stage amplifier have been greatly improved. The effectiveness of the circuit has been verified in standard 65 nm CMOS process, the proposed three-stage amplifier has 90.9 dB DC-gain, 31.2 kHz unity-gain frequency, and 78.2° phase margin while consuming 32.8nW power, and occupying chip area of 0.00082 mm2 from a 0.25 V supply while driving a 100pF load.
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More From: AEU - International Journal of Electronics and Communications
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