Abstract
In this paper, the optimisation procedure for a static induction transistor (SIT) in silicon carbide is described and its application in a typical RF heating circuit is presented. A field plate edge termination is optimised for a 10 /spl mu/m thick epitaxial layer with doping in the range 10/sup 15/ cm/sup -3/ to 10/sup 16/ cm/sup -3/. Results show a breakdown voltage of 1280 V, corresponding to 68% of the theoretical value. For the chosen application an epitaxial layer doping level of 5/spl times/10/sup 15/ cm/sup -3/ is revealed to offer the best compromise. This allows pinch off of drain voltages exceeding 600 V from a 20 V gate drive whilst achieving a current density of 250 A/cm/sup 2/ at an on-state voltage of less than 1 V. Transient simulations are performed for a series load resonant converter using SiC SITs or silicon MOSFET with a switching frequency of 27.12 MHz. The results emphasise the suitability of the SIT for RF heating applications.
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