Abstract
An integrated clock and data recovery circuit (CDR) applying the PLL technique has been developed for future optical transmission systems. It is fabricated in a 0.5 /spl mu/m/50 GHz f/sub T/ double-polysilicon bipolar technology using only production-like process steps. The circuit operates up to 40 Gb/s, which is the highest operating speed to date for this type of IC in a silicon bipolar technology.
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