Abstract

The technological importance of interconnect structures in integrated circuits has been introduced. To fabricate these structures, many process steps are needed. In particular, several deposition techniques for the formation of thin metallic films are involved. Each of these processes is exemplary of particular aspects of the solidification of the metal. In this chapter, we shall focus on copper electroplating as a solution to fill the hollow conducting lines or contact holes (vias). As briefly explained, the void-free filling of these structures requires a specific growth regime called superconformal. We will now examine how a kinetic control of the electrodeposition of Cu may promote this particular regime in the case of damascene interconnects and TSVs.

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