4×100Gb/s PAM4 Multi-Channel Silicon Photonic Chipset With Hybrid Integration of III-V DFB Lasers and Electro-Absorption Modulators

Abstract

A silicon photonic based transmitter and receiver chipset for 4x106Gb/s 400GBASE-DR4 data rates is presented. Each channel of the transmitter chip reaches high extinction ratio and optical modulation amplitude (OMA) with a low TDECQ penalty in full compliance with the IEEE standard. The receiver chips possess high responsivity with low polarization dependent loss. The use of discrete III-V arrayed components hybridized onto the silicon platform and passive alignment of single-mode fibers provides a low-cost, compact and scalable solution extendable to even higher aggregate rates and channel count.