Abstract

Using Technology Computer-Aided Design (TCAD) 3-D simulation, the single event effect (SEE) of 25 nm raised source-drain FinFET is studied. Based on the calibrated 3-D models by process simulation, it is found that the amount of charge collected increases linearly as the linear energy transfer (LET) increases for both n-type and p-type FinFET hits, but the single event transient (SET) pulse width is not linear with the incidence LET and the increasing rate will gradually reduce as the LET increases. The impacts of wafer thickness on the charge collection are also analyzed, and it is shown that a larger thickness can bring about stronger charge collection. Thus reducing the wafer thickness could mitigate the SET effect for Fin-FET technology.

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