Abstract
An ECL-compatible GaAs 250-gate macrocell array has been successfully designed and fabricated using a three-level series gate low-power source-coupled FET logic (LSCFL) and a newly developed 0.4- mu m-gate self-aligned MESFET process. The unloaded propagation delay time was 30 ps/gate at a 2.4-mW/gate power dissipation. The loaded delay time with fan-out=3 and a 2-mm line length was as fast as 74 ps. The flip-flop toggle frequency was 7.5 GHz. A 2*2 asynchronous transfer mode (ATM) switch circuit was constructed on the macrocell array, and a maximum operation frequency of 2 GHz was achieved.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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