3 - Patterning Challenges in Microelectronics

Abstract

Patterning is a sequence of process steps that enable the formation of features from a lay-out into a specific material or stack of materials. Typically, patterning is the addition of lithography, plasma etching and stripping or wet cleaning. For decades, optical lithography has been the driver of microelectronics, as the technologies’ critical dimensions (CDs) were directly defined by the photolithography resolution known as the Rayleigh criteria. But for the last few years, optical lithography alone has not been able to achieve the higher resolution and lower dimension required for integrated circuits. New patterning techniques such as multiple patterning, EUV lithography, direct self-assembly (DSA), e-beam lithography or nanoimprint lithography are being developed to achieve future node requirements. In this chapter, we will present each alternative technique in terms of the principle, challenges and results from an etch point of view.