Abstract

This chapter deals with basic lithographic resist process defectivity and the potential yield limiting effect on device production yields. It is also presents a summary of defectivity detection systems used for basic lithographic process characterization and device yield enhancement efforts in general. In the manufacture of modern integrated circuits, the wafers in process are subjected to as many as 35 lithography steps. At each of these steps, there are opportunities for yield loss induced by process shifts ordefects. These problems can be caused by drift in tool parameters, material problems, or environmental factors. Problems can be the result of an unplanned change in a process parameter or the interaction of two or more process parameters. Wafer inspection tools used in production applications are typically judged on the following criteria: sensitivity, throughput, stability, automation, reliability, cost of ownership, and false defect rate. The weight assigned to each factor is dependent on the target application.

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