2.9 A 29dBm 18.5% peak PAE mm-Wave digital power amplifier with dynamic load modulation

Abstract

High speed, mm-Wave silicon transceivers with "Watt-level" output power have become necessary in recent years to support multi Gb/s communication protocols over realistic data-link lengths. However, efficient generation of power at mm-Waves is challenging in modern silicon processes with low breakdown voltages. Recent efforts have demonstrated "Watt-level" power generation using both silicon CMOS and HBT processes , but with <;10 % peak Power-Added-Efficiency (PAE) and without the ability to support modulation or power control efficiently. mm-Wave power DACs have been reported before, but with moderate output power (~ 24dBm) and low peak and average PAE (<;7%). This paper introduces a Watt-level mm-Wave digital power amplifier with significantly higher PAE at peak power level and back-off compared to existing state-of-the-art. Using highly efficient stacked Class-E amplifier unit cells, a 28.9dBm digital power amplifier is reported using a 0.13um SiGe HBT process with 18.4% peak PAE and 11% PAE at -6dB back-off with 8-level output amplitude control. Several innovative features like supply switch-less Class-E modulators to enable peak PAE, and a variable characteristic-impedance (Z <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">char</sub> ) transmission-line-based dynamic load modulation network to maintain PAE under back-off have been demonstrated.