Конструирование шин питания и заземления в интегральной схеме с вставкой фиктивного металлического заполнителя с учетом временных параметров

Abstract

As dummy metal fill insertion is mandatory step for integrated circuits’ (IC) current manufacturing processes, many works are targeting better fill insertion with small coupling capacitance. However, with scaling technology trends, smaller IR drop is becoming more and more required, as its high value can lead to integrated circuit working failures. To ensure IR drop reduction, a new approach was proposed: while doing dummy fill insertion, firstly, metal shapes which are tied to power and ground nets were inserted and then timing aware dummy metal shapes were added. It has been established that power and ground metal fill shapes were creating shield layers, hence optimizing IR drop. Later it was found that timing aware dummy metal fill insertion was creating dummy metals for ensuring final metal ratio. Experiments have shown that with the use of proposed method, for 5 different designs IR drop has been reduced on average by about 11,9 %; however, placement and routing tool runtime has been increased by about 27,8 % and overall capacitance has been increased by about 4,4 %.