Abstract

Litho-aware design methodology is the key to enable the aggressive scaling down to the future technology node. Boundary based methodology for cellwise OPC has been proposed to account for influence from features of neighboring cells. As technology advances toward 32 and 22 nm, more columns of features are needed as representative environments for the boundary-based cellwise OPC. In this paper, we propose a new method that combines the fill insertion and boundary-based cellwise OPC to reduce the mask data size as well as the prohibitive runtime of full-chip OPC, making cell characterization more predictable. To make the number of cell OPC solutions easy to handle, we present a new methodology which uses dummy fill insertion both inside and outside cells to solve the issue for technologies beyond 45 nm. Experimental results show a solid 30% improvement on average and maximum edge placement errors (EPE) over the previous work.

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