Σχεδίαση και ανάπτυξη ολοκληρωμένων κυκλωμάτων για συστήματα υπερευρείας ζώνης με έμφαση στα κυκλώματα του δέκτη

Abstract

The domain of RF engineering for electronic circuits, targeting the application of telecommunication systems, constitutes a field of intense research activities. The UWB protocol that occupies a frequency spectrum between 3.1 and 10.6 GHz is the subject of the current work which aims to the design, fabrication and measurement of electronic circuits with emphasis put on the receiver’s RF front end. The initial focus of the research work targets the Low Noise Amplifier (LNA) circuit, a demanding and challenging circuit that being at the very front of the receiver’s chain, has to compromise among different and contradictory requirements, namely the extended bandwidth, the gain, the power and chip area consumption and the noise performance. Existing topologies in the literature were explored and classified and two among them were selected for further research. The first fabricated chip includes three LNAs, two of which apply the common source topology with input bandpass filter and inductive source degeneration and their difference lies in the measurement method. One amplifier is measured on wafer while the other is mounted on board. That way, intuition is acquired regarding the effect of the bondwires that act as the interface between the chip and the board. At the same time, ESD protection strategy is applied as the chip is more vulnerable to static currents. The third LNA is based on the feedback topology and constitutes a work of novelty, where bandwidth extension techniques were applied, comprising of inductive elements. The following measurement procedure was successful indicating an upper frequency of operation for the feedback LNA up to 7GHz. The focus of the work after the LNAs was shifted to system level for the implementation of the total RF front end of the receiver up to 10.6GHz. The system comprises an improved version of the feedback LNA followed by two identical paths, each one consisting of a mixer, a high pass filter and an output buffer at 50 Ohm for measurement purpose. The challenges that are mostly highlighted are the mixer design in conjunction with the necessary balun interface from the single ended output of the LNA to the differential mixer. A novel technique is proposed for the balun that builds on the differential pair topology and provides coupling between the load elements that both are implemented with a center tapped inductor. That way the designed balun achieves balanced outputs in terms of amplitude and phase. The technique is supported by mathematical analysis and the comparison between computed and simulated results show convergence. The resulting mixer that includes the balun belongs to the folded cascode differential connection. Moreover, given the limitations of the available measurement equipment, several layout techniques were applied; particularly in the issue of the external LO signal feeding. The two quadrature LO signals are provided in single ended form and traverse the chip by two equal length transmission lines that are separated at the center of the chip and reach the on chip single to differential converters that are placed close to the mixers. In every critical point, care is taken to shield the high frequency signals from interferences. In any case, the placing of a high number of individual elements that have different requirements on the same chip requires for compromises, while layout techniques and rules of thumb have been applied to the maximum extend. The final proposed architecture belongs to the direct conversion category and worked successfully up to the frequency of 8.5GHz. It achieves gain of 25dB, double sideband noise figure of 7dB and power consumption of 62.7 mW.