РЕАЛИЗАЦИЯ В БАЗИСЕ ПЛИС РЕЛЯТОРНЫХ КОНТРОЛИРУЮЩИХ ОПРОСНЫХ УСТРОЙСТВ ЦИФРОВЫХ СИГНАЛОВ

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The requirements for modern means of technical control and functional diagnostics ofequipment for critical applications are formulated, one of which is the processing of diagnosticinformation at a real-time pace. It is noted that for working with digital diagnostic signals, relational monitoring polling devices based on the apparatus of ordinal logic, which gives a significanttime gain over traditional binary logic, are promising. The hardware implementation of ordinal-logical polling devices in the FPGA basis, along with the obvious advantages of the developmentstage, will allow for operational reconfiguration of the internal structure to adapt to thechanging operating conditions of the control object. The hardware implementation of two knowndevices is considered. A variable priority device is used to identify the sensor that has detected afailure or malfunction, with the possibility of setting the sensor number from which the survey willbegin, and the direction of traversing the sensor tuple. The device of centralized control of a groupof objects is used to search for an extreme (maximum or minimum) digital diagnostic signal withsimultaneous determination of the number of the corresponding sensor in one clock cycle of themonitoring and diagnostic system. The development of combinational data schemes of monitoringsurvey devices was carried out by means of ISE Design Suite 14.7. The positive results of testingthe algorithms of the created models are presented, summarized in tables of the states of the inputsand outputs of the circuits and illustrated by time diagrams of binary signals at the terminals ofthe circuits. An estimate of the required FPGA resource costs is given, expressed in the number oflogical elements and user contacts. Also, using the example of low integration devices and themost resource-intensive samples, the upper and lower estimates of the number of FPGAs of varioustypes of the Xilinx Spartan-6, Xilinx Virtex-4 families and the domestic 5576/5578 series ofJSC KTC Electronics are given. It is established that with the number of diagnostic sensors up to200, depending on the FPGA family, up to 17 low integration chips and up to 7 resource-intensivechips are required to implement one monitoring polling device.