Zero-voltage Switching Inverter Research Articles

Non‐ideal behavior of ZVS inverter comprising variable and fixed frequency operation: Analysis, compensation, and verification

• ZVS inverters based on TCM with frequency limit allow for high efficiency. • Nonidealities can impact output waveforms of ZVS inverters. • Propagation delay, filter capacitor, and DC-link capacitor worsen output waveforms. • Detailed analysis leads to suitable compensation methods. • Implementing these in the modulation scheme delivers smooth waveforms with low THD. This paper presents a study of a two-level inverter. It proposes a modulation scheme for inverters featuring zero-voltage switching (ZVS) with both fixed and variable switching frequency operation. The control scheme uses a hybrid method to determine the switching actions of the half-bridge consisting of a current threshold detection circuit and predictions from numerical evaluations of fundamental waveforms of an ideal half-bridge circuit. Compared with conventional fixed frequency PWM inverters, the inverter in this study exhibits higher rms currents but eliminates switching losses. As several components in practical setups of the inverter inevitably introduce non-idealities, a study of these and their impact on the output waveforms follows. The study comprises the propagation delay of the current threshold detection circuit, the filter capacitance, and the DC-link capacitance. Our study demonstrates the need to consider these effects. We show that smooth output waveforms can be achieved for low and high voltage applications if these effects are properly taken into account in an experimental setup. The total harmonic distortion (THD) is used to evaluate the output waveform quality, which is 0.81% when all effects are properly considered, © 2017 Elsevier Inc. All rights reserved.

Load‐independent inverse class‐E ZVS inverter and its application to wireless power transfer systems

This paper proposes a load-independent inverse class-E zero-voltage switching (ZVS) inverter. The proposed inverter achieves the constant output current and the ZVS at any load resistance without any control. The waveforms and design equations of the proposed inverter are shown. Besides, a wireless-power-transfer system was implemented using the proposed inverter. The designed WPT system kept the constant output voltage and the ZVS against load variations, which denoted the effectiveness of the proposed inverter and validities of the analytical equations.

Zero-Voltage-Switching Single-Phase Full-Bridge Inverter With Active Power Decoupling

Single-phase zero-voltage-switching (ZVS) inverter with wide bandgap devices has higher efficiency and power density. However, the dc-side capacitor of the inverter will suffer double line frequency ripple and reduces the lifetime of the dc bus capacitor. Active power decoupling (APD) is an effective method to replace the short lifetime electrolytic capacitor with a smaller film capacitor. In order to help achieving the ZVS condition for ZVS inverter and the additional APD circuit, this article presents a ZVS topology for single-phase full-bridge inverter with APD circuit by adding an auxiliary branch between the dc source and the bridge legs. The auxiliary branch is composed of a clamping capacitor, an auxiliary switch, and a resonant inductor. A ZVS pulsewidth modulation scheme is proposed for a single-phase inverter with APD. The gate drive pulses are designed to realize the ZVS turn-on for the main switches of both APD circuit and single-phase full-bridge inverter. Circuit operation stages are analyzed and ZVS conditions are given. Finally, the proposed ZVS inverter with APD circuit is verified on a 1.5-kW inverter prototype.

Variable Frequency Average Current Mode Control for ZVS Symmetrical Dual-Buck H-Bridge All-GaN Inverter

The quasi-square-wave (QSW) zero-voltage-switching (ZVS) symmetrical dual-buck H-bridge (DBHB) all-GaN inverter has been proven to have high efficiency and high density in Google's Little Box Challenge. This variable frequency QSW ZVS inverter is drawing more and more interest in the industry and academia. However, the ac current control with cycle-by-cycle variable frequency ZVS operation is a basic challenge for this inverter. The conventional control methods for this QSW ZVS inverter, such as the hysteresis current mode control and the variable on-time control, require high-speed current sensing or zero-crossing detection (ZCD) circuits, which are very sensitive to noises. In this article, achieving variable frequency average current mode control with variable frequency pulsewidth modulation (VFPWM) is discussed and implemented for this QSW ZVS inverter to eliminate high-speed current sensing or ZCD circuits. For any synchronous half-bridge type converter, the voltage conversion ratio is dependent only on the duty-cycle in either continuous conduction mode (CCM) or QSW ZVS mode. The frequency of the PWM triangular carrier is another degree of freedom. In this control method, the averaged inductor current is sensed and regulated by the average current mode feedback controller and the duty-cycle is generated by the average current controller. The frequency of the PWM carrier is variable and directly calculated based on the duty-cycle signal and the sensed and filtered voltage and current signals. Since all the sensed signals for this current controller are low speed and filtered signals, this current control is highly immune to noises. The reliability of ZVS for this inverter is improved. The complexity of the controller is also reduced. A detailed analysis of the QSW ZVS conditions for the full range operation of the symmetrical DBHB inverter is done in this article. More negative currents can be introduced to reduce the switching frequency and increase the reliability of ZVS. A frequency limiter helps limit the frequency when the current is close to zero or under light load conditions. A frequency updating method with a constant and low interrupt frequency in a digital controller is also discussed. Finally, to verify this control method, a 1-kW all-GaN DBHB inverter prototype is developed and tested in this article.

Safe Startup Method for Zero-Voltage-Switching MOSFET Grid Inverter

Zero-voltage-switching (ZVS) mosfet grid inverter has distinct advantages such as higher efficiency and higher power density. However, the ZVS inverter may lose ZVS condition during startup stage if it does not start properly. It may increase the voltage stress on mosfet s and even destroy the power semiconductor device. In order to achieve the ZVS condition for ZVS inverter during the startup stage, this paper proposes a safe startup method with an auxiliary clamping capacitor pre-charging circuit and designed ZVS pre-charging pulse sequence. The pre-charging circuit is enabled only at the startup stage. Theoretical analysis shows that the proposed method is capable of reducing the voltage stress during the startup stage for the ZVS inverter. Finally, the proposed safe startup method is verified on a 3 kW grid inverter.

A High-Frequency Inverter for Variable-Load Operation

This paper presents a new inverter architecture suitable for driving widely varying load impedances at high frequency (HF, 3–30 MHz) and above. We present the underlying theory and design considerations for the proposed architecture along with a physical prototype and efficiency optimizing controller. The HF variable-load inverter (HFVLI) architecture comprises two HF inverters with independently controllable amplitude and phase connected together and to the load via a lossless power combining network, implemented here as an immittance converter. By controlling the amplitudes and relative phase of the two constituent inverters, the loading seen by each constituent inverter can be kept in a desirable range even for wide variations in load impedance. This allows for the use of highly efficient zero-voltage switching inverters that would otherwise be precluded or limited in applications presenting wide impedance ranges, such as wireless power transfer and RF plasma generation. The prototype HFVLI system demonstrates the benefits of the proposed approach. It operates at 13.56 MHz and can supply a maximum output power of 1 kW into a 21.8 + 0.3j load at an efficiency of 95.4% and is able to drive a wide range of capacitive and inductive loads at high power with high efficiency.

Comparative Experimental Evaluation of Zero-Voltage-Switching Si Inverters and Hard-Switching Si and SiC Inverters

Several efforts have been put in the reduction of the power losses of dc–ac converters by investigating soft-switching topologies, which have been reported to boost efficiencies of silicon inverters up to 99%. However, the auxiliary circuits of the switches significantly impact on the circuit complexity. Conversely, the use of wide bandgap devices offers an alternative for the reduction of the losses, while keeping the simple structure of a traditional inverter. This paper aims to experimentally evaluate the performance of four prototypes in terms of efficiency and costs. Two zero-voltage switching inverters, differing only in the power switches, and two comparable hard-switching inverters, mounting both silicon and silicon carbide devices, have been built and compared. Overall, the soft-switching inverters allow improving the efficiency at high output current in comparison with hard-switching Si inverters, but their efficiency is comparable to that of silicon carbide (SiC) inverters or even lower at low output currents. The economic analysis has shown that the cost of the power stage of the soft-switching inverters and the hard-switching SiC inverter is about 2.5 and 1.5 times that of the hard-switching inverter based on Si insulated gate bipolar transistors, respectively.

A 13.56-MHz Full-Bridge Class-D ZVS Inverter With Dynamic Dead-Time Control for Wireless Power Transfer Systems

This paper presents the development of a Class-D full-bridge zero-voltage switching (ZVS) inverter, applicable to wireless power transfer (WPT) systems, operating at 13.56 MHz switching frequency with dynamic dead-time control (DDTC). Resonant-coupled WPT systems are being designed at ultrahigh switching frequencies to reduce the size of the wireless link and the passive components. Maintaining ZVS while controlling the output power delivered to a fixed or variable load is one of the major challenges of designing inverters at multi-MHz switching frequencies. DDTC is the approach deployed in this paper to sustain soft switching of a Class-D full-bridge inverter over the full range of output power while regulating the input dc bus voltage. Simulation results are presented to show that dynamically controlling the dead-time during input dc bus voltage variations reduces switch-node voltage overshoot, prevents large current spikes in the switching devices, and reduces associated high switching loss. Practical results obtained show that DDTC reduces switch-node voltage overshoot, increases the inverter efficiency, and reduces the steady-state temperature of the inverter during output power regulation.

Analysis and Design of Filament Power Supply with Voltage-Fed Single-Switch ZVS Inverter

In this paper, an off-line voltage-fed single-switch zero-voltage-switching (ZVS) inverter is analyzed and designed for the filament power supply of cooker magnetrons. Due to the low resistance of cathode filament, an isolation transformer with large turn ratio is used. To obtain the ZVS operation, a parallel-resonant capacitor is connected to the primary of transformer. The capacitor, transformer and filament constitute a parallel resonant tank. Both the transformer leakage inductance and the transistor output capacitance are merged into the resonant tank. The resonant energy provides the ZVS operation of the inverter switch, and the secondary voltage drives the cathode filament. To verify the analysis, a prototype inverter is built and tested. Experimental results validate the circuit design.

Modeling and Optimization of a Zero-Voltage Switching Inverter for High Efficiency and Miniaturization

In a zero-voltage switching (ZVS) inverter, high conversion efficiency and miniaturization are expected since switching loss can be dramatically reduced with proper design. In order to realize ZVS condition, auxiliary components such as inductors, capacitors, and switches are embedded in the inverter to implement the function. Since the design of auxiliary components is critical to the ZVS inverter, it is impossible to realize maximum efficiency or minimum size by following the conventional design procedure. This paper introduces an optimized design methodology for a three-phase ZVS inverter with objectives of both high efficiency and miniaturization. Based on the loss models of different commercial IGBT modules under different ZVS conditions, as well as the loss models of auxiliary components and filter inductors, the issue of pursuing highest efficiency and power density is transformed into solving a constrained nonlinear multivariable problem. According to the proposed design methodology, all parameters that influence the efficiency and physical dimensions are considered simultaneously. Thus, the optimized selection of the IGBT module, the parameters of the auxiliary components and the filter inductors would be obtained. A 30-kW three-phase ZVS inverter prototype is built to verify the proposed design method. With proposed design method, the improved prototype has achieved both smaller passive components volume and higher efficiency compared to the former prototype.

Analysis and Compensation of Dead-Time Effect of a ZVT PWM Inverter Considering the Rise- and Fall-Times

The dead-time effect, as an intrinsic problem of the converters based on the half-bridge unit, leads to distortions in the converter output. Although several dead-time effect compensation or elimination methods have been proposed, they cannot fully remove the dead-time effect of blanking delay error, because the output current polarity is difficult detect accurately. This paper utilizes the zero-voltage-switching (ZVT) technique to eliminate the blanking delay error, which is the main drawback of the hard-switching inverter, although the technique initially aims to improve the efficiency. A typical ZVT inverter—the auxiliary resonant snubber inverter (ARSI) is analyzed. The blanking delay error is completely eliminated in the ARSI. Another error source caused by the finite rise- and fall-times of the voltage is analyzed, which was not considered in the hard-switching inverter. A compensation method based on the voltage error estimation is proposed to compensate the rise- and fall-error. A prototype was developed to verify the effectiveness of the proposed control. Both the simulation and experimental results demonstrate that the qualities of the output current and voltage in the ARSI are better than that in the hard-switching inverter due to the elimination of the blanking delay error. The total harmonic distortion (THD) of the output is further reduced by using the proposed compensation method in the ARSI.

Design Methodology of Resonant Inductor in a ZVS Inverter

In a zero-voltage switching (ZVS) inverter, the resonant inductor is used to realize soft-switching aimed at dynamic loss reduction under high switching frequency conditions. For this purpose, the losses on the resonant inductor should be low enough to ensure a significant loss decrease for the whole system. Besides, ZVS inverters are usually operated at higher frequency than their hard-switching counterparts to allow size reduction of the passive components including the resonant inductor. This paper introduces a methodology incorporating new design rules for high efficiency and miniaturization of the resonant inductor with a gapped core in a ZVS inverter. High frequency winding losses generated by nonsinusoidal waveforms are discussed. Different winding schemes and positions of both barrel and flat windings are discussed and compared in order to find the most efficient and compact design. An inductor prototype utilized in a 100-kW ZVS inverter has been built. Both the finite-element analysis results and the experimental result are demonstrated to verify the design methodology.

Design of a DC-DC Converter With Phase-Controlled Class-D ZVS Inverter

This paper presents a design methodology of switching power converters with visualizations of converter characteristics on a system-parameter space. The computation techniques of the bifurcation parameter derivations are used for the characteristics visualizations directly. This paper shows a design of the resonant converter with the class-D zero-voltage-switching (ZVS) inverter as a design example. By drawing the ZVS region and the output-power contour map on the two-dimensional system parameter space, it is possible to obtain the component values that satisfy the ZVS condition at any phase shift. The validity and effectiveness of the proposed design strategy was confirmed by showing the quantitative agreements between PSpice-simulation and experimental results.

Steady-State Analysis and Design of Class-DE Inverter at Any Duty Ratio

This paper presents steady-state analytical expressions of the class-D zero-voltage switching inverter at any duty ratio along with a design example. The obtained expressions include stead-state voltage and current waveforms, output power capability, peak switch voltage, peak switch current, output power, and power conversion efficiency as functions of the duty ratio. Additionally, switching-timing allowance due to antiparallel diodes of switching devices can be predicted from the analytical results. The analytical expressions are verified by showing quantitative agreements with PSpice simulations and circuit experiments.

Steady-State Analysis of ZVS and NON-ZVS Full-Bridge Inverters with Asymmetrical Control for Induction Heating Applications

This paper presents a steady-state operation analysis of full-bridge series-resonant inverters focusing on the distorted load current due to low-quality-factor resonant circuits in induction heating and other applications. The regions of operation based on the zero-voltage switching (ZVS) and non-zero-voltage switching (NON-ZVS) operations of the asymmetrical voltage-cancellation control technique are identified. The effects of a distorted load current under a wide range of output powers are also analyzed for achieving a precise ZVS operating region. An experimental study is performed with a 1kW prototype. Simulation and experimental studies have confirmed the validity of the proposed method. An efficiency comparison between the variable frequency method and the conventional fixed-frequency method is provided.

A Hybrid-Switch-Based Soft-Switching Inverter for Ultrahigh-Efficiency Traction Motor Drives

This paper presents a hybrid switch that parallels a power MOSFET and an insulated-gate bipolar transistor (IGBT) as the main switch of a zero-voltage switching (ZVS) inverter. The combination features the MOSFET conducting in the low-current region and the IGBT conducting in the high-current region, and the soft switching avoids the reverse recovery problem during the device turn-on. A custom hybrid switch module has been developed for a variable-timing-controlled coupled-magnetic-type ZVS inverter with a nominal input voltage of 325 V and the continuous output power of 30 kW for a traction motor drive. Experimental results of the hybrid-switch-based inverter with the total loss projected by temperature indicate that the inverter achieves 99% efficiency at the nominal condition and demonstrate ultrahigh-efficiency operation over a wide load range. At 375-V input, the maximum measured efficiency through temperature projection and loss separation analysis is 99.3%.

A Zero-Voltage Switching Three-Phase Inverter

A new modulation scheme for the active clamping zero-voltage switching (ZVS) inverter is proposed. With the proposed modulation scheme, the inverter can realize ZVS operation in all switching devices and can remarkably suppress the reverse recovery current in insulated-gate bipolar transistor's antiparallel diodes as well. All the switches can operate at a fixed frequency in the new modulation scheme. Also, with the new modulation scheme, the ZVS inverter has some voltage boost capability, which is suitable for renewable energy generation. The inverter can achieve ZVS in all the switches under the grid current power factor angle from zero to ±π/6. The soft-switching condition of this inverter is analyzed. The operation principal and design guideline are described in detail. The previous theory is verified in a 30-kW inverter prototype.

Design of Soft-Switching Control Circuits in Vibrating Screen Invert Power Source

A new control system of vibrating screen invert power source was designed according to the question of step regulation of current and power in vibrating screen in the use of MCU. Zero-voltage switching inverter is used to reduce the loss of switching devices in the main circuit and MSP430 MCU is the core of the control circuit. A PI voltage regular with a filter and a feedback type, IGBT over-voltage protection circuit and PWM pulse generating and drive circuit are designed. Experimental results show that the inverter power has high precision, fast response, and anti-interference ability, and the system can obtain better steady state accuracy and dynamic characteristics and greatly improve the efficiency of shaker.

Locus of flux linkage for three-phase ZVS inverter

ZVS(zero voltage switching) PWM(pulse width modulation) inverters have attracted much attention recently. The basic idea is to use ZVS circuit as the main circuit of inverter resonance at the beginning of every carrier period so that each power device can com-mutate when voltage of the main circuit’s DC bus line is zero. To ensure the resonant circuit to operate properly, sawtooth with alternate slope (positive or negative) is used as carrier. But the time of zero voltage vectors with such PWM pattern is greatly different from traditional hard-switching PWM pattern. This paper discusses the locus of flux linkage under soft-switching PWM pattern by using space voltage vector. It is pointed out that, under the hard-switching PWM pattern, speed of flux linkage is adjusted by zero space voltage vector. When soft-switching PWM pattern is used, however, effective time of space voltage vector varies considerably, sometimes even without zero space voltage vector. Therefore non-zero space voltage vector has been used to make the speed of flux linkage locus equal to that of hard-switching PWM pattern. The cause of current distortion in soft-switching PWM inverters is also discussed. Based on the flux linkage locus circle, corresponding compensation methods are proposed. Experimental results show that the described method can effectively improve output current waveform of inverter.

歪率改善のための制御を施した複合回路方式電圧共振形インバータの動作特性

歪率改善のための制御を施した複合回路方式電圧共振形インバータの動作特性