Abstract

The dead-time effect, as an intrinsic problem of the converters based on the half-bridge unit, leads to distortions in the converter output. Although several dead-time effect compensation or elimination methods have been proposed, they cannot fully remove the dead-time effect of blanking delay error, because the output current polarity is difficult detect accurately. This paper utilizes the zero-voltage-switching (ZVT) technique to eliminate the blanking delay error, which is the main drawback of the hard-switching inverter, although the technique initially aims to improve the efficiency. A typical ZVT inverter—the auxiliary resonant snubber inverter (ARSI) is analyzed. The blanking delay error is completely eliminated in the ARSI. Another error source caused by the finite rise- and fall-times of the voltage is analyzed, which was not considered in the hard-switching inverter. A compensation method based on the voltage error estimation is proposed to compensate the rise- and fall-error. A prototype was developed to verify the effectiveness of the proposed control. Both the simulation and experimental results demonstrate that the qualities of the output current and voltage in the ARSI are better than that in the hard-switching inverter due to the elimination of the blanking delay error. The total harmonic distortion (THD) of the output is further reduced by using the proposed compensation method in the ARSI.

Highlights

  • The half-bridge, as a basic unit, employs two stacked semiconductor switches connected across the DC voltage to realize energy transfer

  • Both the simulation and experimental results demonstrate that the qualities of the output current and voltage in the auxiliary resonant snubber inverter (ARSI) are better than that in the hard-switching inverter due to the elimination of the blanking delay error

  • total harmonic distortion (THD) of the output current is reduced to 0.712%

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Summary

Introduction

The half-bridge, as a basic unit, employs two stacked semiconductor switches connected across the DC voltage to realize energy transfer. Different commutation type leads to different voltage error caused by the dead-time This kind of dead-time effect is blanking delay error, which is the main error in the half-bridge-based topology [12]. The external resonant capacitors are always required to reduce the voltage changing rate of the switches, so that the turn-off loss and electromagnetic interference (EMI) can be reduced This will lead to output voltage distortion, which is caused by the finite commutation time. This kind of dead-time effect is quite different from that in the hard-switching inverters. The simulation and experiment are undertaken to verify the effectiveness of the proposed method

Principle
Circuit
Heavy Load Condition
Light Load Condition
Compared with the Hard‐Switching Inverter
Dead‐time
Compensation Method
FigureIV8 FPGA shows of thea digitally controlled
Photograph
The voltage error be calculated from
10. Average
11. Resonant
12. Output
16. Experimental
Findings
Conclusions
Full Text
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