Write Energy Consumption Research Articles

Energy-aware writes to non-volatile main memory

Scalability challenges of DRAM technology call for advances in emerging memory technologies, among which Phase Change Memory (PCM) has received considerable attention due to its non-volatility, storage density and capacity advantages. The drawbacks of PCM include limited write endurance and high power consumption for write operations (upto 10x in comparison to read operations). In this paper, we investigate new techniques that would perform writes to PCM with energy awareness. Our results show that we can minimize the write energy consumption by up to 8.1x by simply converting PCM native writes to read-before-write, and upto an additional 22.9% via intelligent out-of-position updates.

High-density magnetoresistive random access memory operating at ultralow voltage at room temperature

The main bottlenecks limiting the practical applications of current magnetoresistive random access memory (MRAM) technology are its low storage density and high writing energy consumption. Although a number of proposals have been reported for voltage-controlled memory device in recent years, none of them simultaneously satisfy the important device attributes: high storage capacity, low power consumption and room temperature operation. Here we present, using phase-field simulations, a simple and new pathway towards high-performance MRAMs that display significant improvements over existing MRAM technologies or proposed concepts. The proposed nanoscale MRAM device simultaneously exhibits ultrahigh storage capacity of up to 88 Gb inch−2, ultralow power dissipation as low as 0.16 fJ per bit and room temperature high-speed operation below 10 ns.

Low writing energy and sub nanosecond spin torque transfer switching of in-plane magnetic tunnel junction for spin torque transfer random access memory

This work investigated in-plane MgO-based magnetic tunnel junctions (MTJs) for the application of spin torque transfer random access memory (STT-RAM). The MTJ in this work had an resistance area product (RA) = 4.3 Ω·μm2, tunneling magnetoresistance ratio ∼135%, thermal stability factor Δ(H)=68 (by field measurement), and Δ(I) = 50 (by current measurement). The optimal writing energy was found to be 0.286 pJ per bit at 1.54 ns for antiparallel (AP) state to parallel (P) state switching, and 0.706 pJ per bit at 0.68 ns for P state to AP state switching. Ultra fast spin torque transfer (STT) switching was also observed in this sample at 580 ps (AP to P) and 560 ps (P to AP). As a result, 0.6–1.3 GHz was determined to be the optimal writing rate from writing energy consumption of view. These results show that in-plane MgO MTJs are still a viable candidate as the fast memory cell for STT-RAM.

Delay and Energy Consumption Analysis of Conventional SRAM

The energy consumption and delay in read/write operation of conventional SRAM is investigated analytically as well as by simulation. Explicit analytical expressions for the energy consumption and delay in read and write operation as a function of device parameters and supply voltage are derived. The expressions are useful in predicting the effect of parameter changes on the energy consumption and speed as well as in optimizing the design of conventional SRAM. HSPICE simulation in standard 0.25μm CMOS technology confirms precision of analytical expressions derived from this paper. Keywords—Read energy consumption, write energy consumption, read delay, write delay.