Wiring Density Research Articles

Current distribution in conducting nanowire networks

Conducting nanowire networks find diverse applications in solar cells, touch-screens, transparent heaters, sensors, and various related transparent conducting electrode (TCE) devices. The performances of these devices depend on effective resistance, transmittance, and local current distribution in these networks. Although, there have been rigorous studies addressing resistance and transmittance in TCE, not much attention is paid on studying the distribution of current. Present work addresses this compelling issue of understanding current distribution in TCE networks using analytical as well as Monte-Carlo approaches. We quantified the current carrying backbone region against isolated and dangling regions as a function of wire density (ranging from percolation threshold to many multiples of threshold) and compared the wired connectivity with those obtained from template-based methods. Further, the current distribution in the obtained backbone is studied using Kirchhoff's law, which reveals that a significant fraction of the backbone (which is believed to be an active current component) may not be active for end-to-end current transport due to the formation of intervening circular loops. The study shows that conducting wire based networks possess hot spots (extremely high current carrying regions) which can be potential sources of failure. The fraction of these hot spots is found to decrease with increase in wire density, while they are completely absent in template based networks. Thus, the present work discusses unexplored issues related to current distribution in conducting networks, which are necessary to choose the optimum network for best TCE applications.

The construction technique of the high granularity and high transparency drift chamber of MEG II

The MEG experiment searches for the charged lepton flavor violating decay, μ +→ e+γ. MEG has already determined the world best upper limit on the branching ratio BR<4.2× 10−13 at 90% CL. An upgrade of the whole detector has been approved to obtain a substantial increase in sensitivity. Currently MEG is in upgrade phases, this phase involves all the detectors. The new positron tracker is a single volume, full stereo, small cells drift chamber (DCH) co-axial to the beam line. It is composed of 10 concentric layers and each single drift cell is approximately square 7 mm side, with a 20 μ m gold plated W sense wire surrounded by 40 μ m and 50 μ m silver plated Al field wires in a ratio of 5:1, about 12,000 wires. Due to the high wire density (12 wires/cm2), the use of the classical feed-through technique as wire anchoring system could hardly be implemented and therefore it was necessary to develop new wiring strategies. The number of wires and the stringent requirements on the precision of their position and on the uniformity of the wire mechanical tension impose the use of an automatic system to operate the wiring procedures. This wiring robot, designed and built at the INFN Lecce and University of Salento laboratories, consists of: ⋅ a semiautomatic wiring machine with a high precision on wire mechanical tensioning (better than 0.5 g) and on wire positioning (20 μ m) for simultaneous wiring of multiwire layers;⋅ a contact-less infrared laser soldering tool; ⋅ an automatic handling system for storing and transporting the multi-wire layers. The drift chamber is currently under construction at INFN and should be completed by the end of summer 2017 to be then delivered to PSI for commissioning.

Effect of broken wire on bending fatigue characteristics of wire ropes

The life of damaged wire rope is difficult to judge and the damaged wire rope is prematurely replaced resulting in an enormous economic waste. This paper studies the effect of different distributions of pre-broken wires on bending fatigue behavior of wire ropes using a self-made bending fatigue test facility. The fatigue lives of wire ropes with different distributions of pre-broken wires were studied using both visual inspection and commercial non-destructive inspection technology, combined with electron microscopy. It is found that broken wires on the surface reduce the bending fatigue life of wire ropes. The broken wires increase the stress in the inner wire strands as well as the contact force between the wires. This leads to a concentration of severe wear, which accelerates the density of broken wires locally, leading to short fatigue lives especially in the case with the most concentrated number of pre-broken wires (1×4). After numerous wires fail by wear and fatigue, others fail by tensile overload, as evidenced microscopically by necking and ductile failure. The damage in the rope at failure defined by counting broken wires is nearly 50% smaller than the damage value given by the commercial non-destructive damage value, based on magnetic measurements.

Current density analysis of electron transport through molecular wires in open quantum systems.

The current density in molecular wires connected to contacts is investigated within the nonequilibrium Green's function formalism combined with the Landauer approach. Energy-dependent and total current density through a series of molecular junctions are calculated in real space representation. A rich variety of current patterns including pronounced ring currents ("vortices") are found even in the defect-free minimal building blocks of molecular devices. The influences of contact positions, functional groups as well as atomic defects on the transport properties are examined systematically for prototypical ortho-, meta-, and para-substituted benzenes as well as heteroaromatic systems. It is found that substitutional functional groups mainly shift the molecular levels and retain characteristic transport channels, while a significant change of electronic pathways and conductance is induced by hetero-aromaticity. The current distribution is used to calculate the static magnetic field distribution in the carbon-based conductors. © 2017 Wiley Periodicals, Inc.

Chip-by-chip configurable interconnection using digital printing techniques

Printed electronics technologies add new fabrication concepts to the classical set of microelectronic processes. Among these, the use of digital printing techniques such as inkjet permits the deposition of materials on top of preexisting substrates without any mask. This allows individual personalization of electronic circuits. Different proposals have been made to make use of such a property: (1) wiring new metallic layers on top of circuits to build programmable logic array-like circuits, (2) programming OTP ROM like memories, and (3) building inkjet-configurable gate arrays. The capability of building an individual circuit with technological steps simpler than photolithographic ones opens a concept similar to the successful field programmable gate array. Although nowadays the process resolution is still low, it can quickly evolve to higher wiring densities and therefore permit a greater level of transistor integration. In this paper, we propose a new structure to realize the connections only by deposition of conductive dots oriented to optimize the area needed to implement the drop-on-demand (DoD) wiring at circuit level. One important feature of this structure is that it minimizes the amount of printed material required for the connection thereby reducing failures often seen with DoD printing techniques for conductive lines. These structures have been validated by two different DoD technologies: inkjet and superfine jet, and have been compared to mask-based photolithography technology with promising results.

The full stereo drift chamber for the MEG II experiment

The MEG experiment, at the Paul Scherrer Institute (PSI) near Zurich in Switzerland, aims at searching for the charged-lepton-flavor-violating decay μ+arrow e+γ, prohibited in the Standard Model but allowed, at a measurable level, in many of its extensions. MEG has already determined the world best upper limit on the branching ratio: BR(μ+arrow e+γ)<4.2×10−13 at 90% CL with the full data set collected in the years 2009–2013. A further improvement of the MEG single event sensitivity requires a substantial upgrade of the detector performances and, in particular, the complete replacement of the positron tracker. The MEG upgrade experiment (MEG II) is currently under construction and it is conceived in order to further improve the sensitivity by one order of magnitude in three years of data taking. The new positron tracker is a high transparency single volume, full stereo cylindrical Drift Chamber, immersed in a non uniform longitudinal B-field, co-axial to the muon beam line. Due to the high wire density (12 wires/cm2), the use of the traditional feed-through technique as wire anchoring system could hardly be implemented and therefore it was necessary to develop new wiring strategies. The number of wires and the stringent requirements on the precision of their position and on the uniformity of the wire mechanical tension impose the use of an automatic system to operate the wiring procedures. The drift chamber is currently under construction at INFN Lecce and Pisa, and should be completed by the summer 2017 to be then delivered to PSI for commissioning. The upgraded detector, the new drift chamber and its construction technique, will be described.

First Demonstration of Fine Line RDL Yield Enhancement using an Innovative Ozone Treatment Process for Panel Fan-out and Interposers

As front end transistor scaling by Moore's law faces economic and technical challenges, interconnect scaling by advanced packaging technologies has started to add value at system level for a variety of electronics applications including consumer, high performance computing and automotive. The focus on yield improvement at every node that has enabled transistor scaling is now becoming a very critical need for high volume manufacturing of advanced packaging technologies such as 2.5D interposers and high density fanout [1]. This paper describes the first demonstration of a novel atmospheric approach based on ozone as an alternative to vacuum-based plasma treatment for photoresist cleaning to enhance the re-distribution layer (RDL) yields in advanced semi-additive process (SAP) processes. The ozone process is applicable to wafers as well as large panels, and is suited for small feature sizes down to 1um that are required for interposers and future fan-out packages. Ozone process provides an environmentally friendly solution eliminating the need for hazardous chemicals used in wet cleaning processes and has the potential to significantly increase throughput and reduce process cost compared to plasma processing by eliminating the need for vacuum chambers. The goal of this research is to demonstrate the effectiveness and benefits of the atmospheric dry ozone process developed using an MKS Instruments ozone delivery system for electrolytic copper plating yield improvement and dry film resist (DFR) residue cleaning, for 1-10um RDL critical dimensions (CD). The paper will describe the process fundamentals and the manufacturing tools, and discuss the characterization by contact angle measurements to confirm wettability of the plating surfaces, as well as demonstrate improvement of fine line RDL plating quality. The ever-increasing requirement for higher computing power in both high power applications and low power hand held or wearable devices is driving the need for higher signal bandwidth connections between logic and memory chips enabled through advances in the packaging world. The wiring density and I/O pitch are scaled down to achieve high bandwidth interconnections on a package with limited routing space. Photolithography, electrolytic copper plating, and copper seed layer etch are three crucial defining the yield and minimum feature size of RDL in the SAP flow. With the feature size scaling down to 3 μm, the quality of the metallized copper structure is crucial for high performance applications. Traditionally, wet chemical cleans are used for improving copper plating yields. The wet chemical process uses hazardous chemicals such as trichloroethylene (TCE) that are not environmentally friendly. These processes may be substituted with an oxygen plasma treatment that can clean organic residues in DFR trenches and improve wettability of the seed layers prior to plating as well as DFR residues after copper plating and DFR stripping. However, such plasma treatment approach requires a vacuum chamber which limits its throughput and cost effectiveness for high volume manufacturing. This paper proposes a higher throughput alternative solution to the plasma treatment process for electrolytic copper plating. Since the ozone gas is generated from oxygen, and reduced to oxygen upon process completion, no hazardous gas is required, or discharged into the atmosphere. To demonstrate the applicability of the ozone treatment to wafer-scale and panel-scale processing, two different types of copper seed layers, physical vapor deposition (PVD) Ti-Cu, and electroless plated copper, were evaluated. The effectiveness of both ozone and oxygen plasma treatments were qualified against a control sample with no treatment. The 7 μm thick DFR was laminated on the copper seed layers, then patterned with a projection lithography tool, and a minimum feature size of 3 μm was resolved. After photolithography, the substrates were subjected to ozone or plasma treatments. The water contact angle measurements show significant wettability improvement on the surfaces of substrates with copper seed layer, DFR, and DFR mesh patterned on a copper seed layer. Copper plating quality was then compared between samples. Both the ozone and plasma treatments resulted in excellent copper metallization quality due to the creation of a hydrophilic surface. The effectiveness of the ozone treatment at 50 deg C was confirmed, thus minimizing any impact on DFR stripping. The ozone treatment was also applied to clean the DFR residues after resist stripping and our results confirmed that the ozone process removed any remaining photoresist residues from the copper surface. In conclusion, this paper proposed and demonstrated high throughput, atmospheric pressure ozone treatment as an innovative alternative to plasma treatment for cleaning the surfaces prior to electrolytic copper plating, as well as for photoresist residue removal after resist strip. The results show yield improvement of plated RDL and DFR residue cleaning. The ozone process does not use any hazardous chemicals or gases and also does not require any vacuum steps, which makes it environmental friendly and high throughput, and offers a promising approach for fine line RDL for interposers and fan-out packages in meeting the semiconductor industry roadmap needs.

DLCコーテッドドリルを用いたプリント配線板の小径穴あけ加工に関する研究

In recent years, needs for micro drilling are increasing, accompanying the development of higher wiring density of printed circuit board (PCB). When drilling PCB for the purpose of making the electric through holes, it has been said that the drill breakage is caused by being filled the chips of GFRP and copper of PCB in the drill flutes. The aim of this study is to clarify the effect of PCB drilling using DLC coated drill on tool wear, chip evacuation and cutting torque. Series of drilling tests of PCB have been carried out to investigate the amount of drill wear, the chips evacuation behavior out of drilled hole with the drill, the shape of chips produced and the cutting torque using DLC-coated drill and non-coated drill. The chips evacuation behavior out of drilled hole with the drill is filmed by a high-speed motion camera and the shape of chips produced is observed by a microscope. The cutting torque is measured by a dynamometer; Kistler 9329A. The amounts of drill flank wear and margin wear using DLC-coated drill and non-coated drill are almost the same. The chips of GFRP using DLC-coated drill are shorter and smaller than those using non-coated drill. The chips evacuation out of drilled hole with the drill using DLC-coated drill is better than those using non-coated drill, and cutting torque using DLC-coated drill is lower than those using non-coated drill.

Highly Conductive Wire: Cu Carbon Nanotube Composite Ampacity and Metallic CNT Buckypaper Conductivity

ABSTRACTCarbon nanotube (CNT) composites are being explored to improve the conductivity and density of electrical wire used in aviation. Presented are the current carrying capacity of a CNT-Cu composite and Roman spectroscopy and electrical conductivity of Buckypaper (BP) made of normal and sorted 95% metallic CNT (m-CNT). The ampacity of the Cu-CNT composite was 3.8% lower than pure Cu. This is significant because it is not in agreement with high CNT ampacity claims. The average conductivity of the CNT in the sorted, 95% metallic BP was 2.5 times higher than the CNT in the un-sorted BP. This shows the importance of the intrinsic CNT conductivity as opposed to interfacial resistances and that the conductivity of the semiconductor CNT present in the un-sorted BP must be much lower than the conductivity of m-CNT. The high conductivity of the sorted BP provides proof that conductivity improvements in CNT composites can be made by the use of sorted, highly conductive m-CNT.

Effect of Layer Spacing and Line Width of PCB Coil on Resonant Frequency

With the development of electronic science and technology, people have entered the information society, a variety of portable electronic products enter people’s lives. A large number of miniature human implantable medical devices applied to clinical fields. The traditional human implantable medical device power supply is implanted battery, its biggest drawback is the treatment problem after the battery power consumption. Whether it is taken to replace the new battery, or deep into the body, there is a huge risk. Therefore, the portable external wireless charging, it becomes the best choice for human implantable medical devices. Because some of the implanted device volume is very small, they can't accommodate bulky solenoid coil, which seriously restrict the application of wireless charging technology in implantable medical devices. Printed circuit board (PCB) coil has the advantages of high wiring density, small volume, light weight, beneficial to the miniaturization of electronic equipment, they can replace traditional solenoid coil, and applied to the wireless charging technology. In this paper, HFSS software is used to simulate, a large number of simulation experiments are carried out on the PCB with 2 layers coils. At the same time, the electrical parameters such as layer spacing, line width and resonant frequency are analyzed. Finally, the conclusion is: in the case of fixed layer spacing, with the increasing of the line width, the resonance frequency is gradually reduced; but the resonance frequency is reduced to a certain extent, it is not changed. When line width is fixed, with the growing layer spacing, the resonance frequency value is constantly increasing, the resonant frequency of the growth is also more and more slow.

Improvement in the transport critical current density and microstructure of isotopic Mg11B2 monofilament wires by optimizing the sintering temperature.

Superconducting wires are widely used in fabricating magnetic coils in fusion reactors. In consideration of the stability of 11B against neutron irradiation and lower induced radio-activation properties, MgB2 superconductor with 11B serving as boron source is an alternative candidate to be used in fusion reactor with severe irradiation environment. In present work, a batch of monofilament isotopic Mg11B2 wires with amorphous 11B powder as precursor were fabricated using powder-in-tube (PIT) process at different sintering temperature, and the evolution of their microstructure and corresponding superconducting properties was systemically investigated. Accordingly, the best transport critical current density (Jc) = 2 × 104 A/cm2 was obtained at 4.2 K and 5 T, which is even comparable to multi-filament Mg11B2 isotope wires reported in other work. Surprisingly, transport Jc vanished in our wire which was heat-treated at excessively high temperature (800 °C). Combined with microstructure observation, it was found that lots of big interconnected microcracks and voids that can isolate the MgB2 grains formed in this whole sample, resulting in significant deterioration in inter-grain connectivity. The results can be a constructive guide in fabricating Mg11B2 wires to be used as magnet coils in fusion reactor systems such as ITER-type tokamak magnet.

Enhancement of critical current densities in (Ba,K)Fe2As2 wires and tapes using HIP technique

(Ba,K)Fe2As2 superconducting wires and tapes are fabricated by using hot isostatic pressing (HIP) technique, and their superconducting properties are studied. In the HIP round wire, transport critical current density (Jc) at 4.2 K has achieved record-high value of 175 kA cm−2 at zero field, and exceeds 20 kA cm−2 even at 100 kOe. Improvement of polycrystalline powder synthesis may play a key role for the enhancement of Jc. In the HIP tape, even larger transport Jc of 380 kA cm−2 is realized at zero field. Based on magnetization and magneto-optical measurements, possible further enhancement of Jc is discussed.

Fabrication and superconducting properties of internal Mg diffusion processed MgB2 wires using MgB4 precursors

Monofilament MgB2/Nb/Monel wires were fabricated using three different MgB4 precursors by an internal Mg diffusion (IMD) process. The wire geometry and heat-treatment conditions were optimized in order to improve the critical current density (Jc) of the MgB2 wire. The influences of the quality of MgB4 powders, such as the particle size and MgO impurity, on the microstructure and superconducting properties of the wires were discussed. Although there were small amounts of voids, unreacted MgB4 particles and MgO impurity existed in the superconducting layers, and the transport layer Jc of the wire with the MgB4 precursor reached 3.0 × 104 A cm−2 at 4.2 K and 10 T, which was comparable to that of IMD-processed wires fabricated using boron precursors. Both the non-barrier Jc and engineering Jc of MgB2 wire made using a MgB4 precursor were enhanced due to the improved grain connectivity and the enlarged fill factor.

Investigating the Effect of Chlorides on the Reaction Kinetics of a Copper Electrodeposition Process

Over the past two decades, the replacement of aluminum interconnects with copper is one of the biggest advances in semi-conductor industry. As the wiring density continues to increase, so does the demand for tighter control on the electrolytic copper deposition process for these industries. Apart from organic additives and other trace metals, one of the crucial component in plating baths mixtures for manufacturing PCB boards and photovolotaic cells is the intermediate cuprous ion composition, which is formed during the copper dispropornation reaction: 2 Cu + (aq) ⇌ Cu(s) + Cu2+ (aq) The cuprous ion is typically unstable in normal acidic solution and it disproportionates into metallic copper and cupric ions. In the presence of chlorides however, the disproportionation reaction equilibrium is shifted and the cuprous ions are stabilized. Cuprous ions are also required in order for the other additives (brightener, suppressor, leveler) used in the process to operate at maximum efficiencies. It is therefore important to know if the Cu2+ intermediate is truly formed and present during the a copper electrodeposition process. In this work, we used Autolab RRDE system to identify mechanisms governing copper electrodeposition process and study the influence of chloride concentration on the generation of intermediates.

Multimode High-Density Link Design Methodology and Implementation

As higher density of interconnects and packages is demanded, crosstalk noise is becoming more important. Multimode or modal signaling offers the ability to improve wiring density with significantly reduced crosstalk by coding the signals using fundamental modes of propagation only. Past work has demonstrated this on uniform channels. This paper presents a design methodology for designing practical nonuniform high density links using multimode signaling. A channel that consists of printed circuit board (PCB) and package routing, and vertical interconnects is designed to achieve highest density and low crosstalk-induced jitter. Compared to the baseline benchmark channel, the optimized channel demonstrates $4\times $ , $4\times $ , and $2\times $ density improvement of PCB and package vertical and package horizontal routing, respectively, and at the same time achieves a 42% RMS jitter reduction. This new approach significantly improves the ability to design high-density low-crosstalk interconnect subsystems in practical scenarios.

Design and Demonstration of Fine-Pitch and High-Speed Redistribution Layers for Panel-Based Glass Interposers at 40-μm Bump Pitch

This article analyzes redistribution layer (RDL) technologies needed for 2.5-dimensional (2.5-D) die integration on thin glass interposers and developed using low-cost processes. The design, fabrication, and characterization of a four-metal layer RDL buildup required for wide input/output (I/O) routing at 40-μm bump pitch and a two-metal layer RDL buildup fabricated directly on glass for high-speed, off-package signaling are described. Such RDL technologies are targeted at 2.5-D glass interposer packages to achieve up to 1 Tb/s die-to-die bandwidth and off-interposer data rates &amp;gt; 400 Gb/s, driven by consumer demand of online services for mobile devices. Advanced packaging architectures including 2.5-D and 3-D interposers require fine-line lithography beyond the capabilities of current organic package substrates. High electrical loss and high cost are characteristic of silicon interposers fabricated using back-end-of-line (BEOL) processes that can achieve RDL wiring densities required for 2.5-D die integration. Organic interposers with high wiring densities have also been demonstrated using a single-sided, thin-film process. This article goes beyond silicon and organic interposers in demonstrating fine-pitch RDL on glass interposers fabricated by low-cost, double-side, and panel-scalable processes. The high modulus and smooth surface of glass help to achieve lithographic pitch close to that of silicon. Furthermore, the low permittivity and low loss tangent of glass reduce dielectric losses, thus improving high-speed signal propagation. A semiadditive process flow and projection excimer laser ablation were used to fabricate four-metal layer (2 + 0 + 2) fine-pitch RDL and two-metal layer RDL directly on glass. A minimum of 3 μm lithography and 20 μm microvia pitch was achieved. High-frequency characterization of these RDL structures demonstrated single-ended insertion losses of −0.097 dB/mm at f = 1 GHz and differential insertion losses of −0.05 dB/mm at f = 14 GHz.

Effect of Reference Scheme on Power and Phase of the Local Field Potential.

Brain signals are often analyzed in the spectral domain, where the power spectral density (PSD) and phase differences and consistency can reveal important information about the network. However, for proper interpretation, it is important to know whether these measures depend on stimulus/behavioral conditions or the reference scheme used to analyze data. We recorded local field potential (LFP) from an array of microelectrodes chronically implanted in area V1 of monkeys under different stimulus/behavioral conditions and computed PSD slopes, coherence, and phase difference between LFPs as a function of frequency and interelectrode distance while using four reference schemes: single wire, average, bipolar, and current source density. PSD slopes were dependent on reference scheme at low frequencies (below 200 Hz) but became invariant at higher frequencies. Average phase differences between sites also depended critically on referencing, switching from 0 degrees for single-wire to 180 degrees for average reference. Results were consistent across different stimulus/behavioral conditions. We were able to account for these results based on the coherence profile across sites and properties of the spectral estimator. Our results show that using different reference schemes can have drastic effects on phase differences and PSD slopes and therefore must be interpreted carefully to gain insights about network properties.

Thermoelectric ionization of, D(-)-centers in a semiconductor quantum wire with a parabolic confinement potential in a strong longitudinal electric field

Conductivity of a semiconductor quantum wire with a parabolic confinement potential was studied within the framework of the zero-range potential model, containing donor impurities, in the longitudinal with respect to its axis electric field at low temperatures. A dispersion equation determining the dependence of the binding energy of the impurity on the electric field strength was obtained. It has been shown that the bound state of an electron on an impurity is destroyed by a strong electric field, i.e. the thermoelectric phenomenon of ionization occurs. It was found that under conditions of low temperatures the dependence of the current density in a quantum wire in the longitudinal electric field has a superlinear character.

Evaluating conducting network based transparent electrodes from geometrical considerations

Conducting nanowire networks have been developed as viable alternative to existing indium tin oxide based transparent electrode (TE). The nature of electrical conduction and process optimization for electrodes have gained much from the theoretical models based on percolation transport using Monte Carlo approach and applying Kirchhoff's law on individual junctions and loops. While most of the literature work pertaining to theoretical analysis is focussed on networks obtained from conducting rods (mostly considering only junction resistance), hardly any attention has been paid to those made using template based methods, wherein the structure of network is neither similar to network obtained from conducting rods nor similar to well periodic geometry. Here, we have attempted an analytical treatment based on geometrical arguments and applied image analysis on practical networks to gain deeper insight into conducting networked structure particularly in relation to sheet resistance and transmittance. Many literature examples reporting networks with straight or curvilinear wires with distributions in wire width and length have been analysed by treating the networks as two dimensional graphs and evaluating the sheet resistance based on wire density and wire width. The sheet resistance values from our analysis compare well with the experimental values. Our analysis on various examples has revealed that low sheet resistance is achieved with high wire density and compactness with straight rather than curvilinear wires and with narrower wire width distribution. Similarly, higher transmittance for given sheet resistance is possible with narrower wire width but of higher thickness, minimal curvilinearity, and maximum connectivity. For the purpose of evaluating active fraction of the network, the algorithm was made to distinguish and quantify current carrying backbone regions as against regions containing only dangling or isolated wires. The treatment can be helpful in predicting the properties of a network simply from image analysis and will be helpful in improvisation and comparison of various TEs and better understanding of electrical percolation.

Research on Identification of Dust Particles on COF

Chip On Film(COF) is the key component of electronic products, and is different from Printed Circuit Board(PCB). The properties of high flexibility, thin thickness, lightweight and high wiring density make it difficult to inspect COF, especially dust particles interference. Dust particles are similar to defects, and it is hard to identify dust particles from defects, so dust particles interference of quality test is the difficulty of automatic surface defect detection. In this paper, a new method to identify dust particles is discussed from abnormal area called junction points detection and machine learning method Support Vector Machine(SVM) according to the characteristics of dust particles. As a result, a 94.8% correct rate of dust particles images identification has been achieved with the method.