Wideband Frequency Doubler Research Articles

Switched Capacitor Bank Design With Geometric Progression for Wideband Frequency Doubler

Switched Capacitor Bank Design With Geometric Progression for Wideband Frequency Doubler

An injection-locked OEO based frequency doubler independent of electrical doubler phase noise deteriorating rule

We propose an injection-locked optoelectronic oscillator (OEO) based wide-band frequency doubler, which is free from phase noise deterioration in electrical doubler, by using a dual-parallel Mach–Zehnder modulator (DPMZM). Through adjusting the optical phase shifts in different arms of the DPMZM, the doubling signal oscillates in the OEO loop while the fundamental signal takes on phase modulation over the light and vanishes at photo-detector (PD) output. By controlling power of fundamental signal the restriction of phase-noise deterioration rule in electrical doubler is totally canceled. Experimental results show that the doubler output has a better phase noise value of, for example, −117 dBc/Hz @ 10 kHz at 6 GHz with an improvement more than 17 dB and 23 dB compared with that of fundamental input and electrical doubler, respectively. Besides, the stability of this doubler output can reach to 1.5×10−14 at 1000 s averaging time. The frequency range of doubling signal is limited by the bandwidth of electrical amplifier in OEO loop.

GaAs HEMT Modeling and its Application to Active Frequency Multipliers

In this article, improved nonlinear modeling technique for microwave PHEMT is described. The accurate small-and large-signal models of HEMT, MESFET devices are used for robust designs and fabrication development. The implementation of model is done by parameter extraction as well as using Agilent’s ADS. The modeling procedure is used to extract the model of PHEMT EC2612 supplied by United Monolithic Semiconductor Inc. This model is used to design single-stage 10/20 GHz wideband frequency doubler with a maximum conversion gain of 3 dB. The doubler has 40% bandwidth over the input frequency range of 8–12 GHz. A band reject at fundamental frequency filter has been designed at output stage of doubler instead of conventional λ/2 open circuit reflector at second harmonic frequency, which is responsible for broadband operation of doubler.

Design issues of a low power wideband frequency doubler implementation in 0.18 μm CMOS

This paper presents design issues of a wideband, low power implementation of a frequency doubler (FD) in a commercial 0.18 μm CMOS process. The FD consists of two identical unbalanced source-coupled pairs with different width-to-length (W/L) ratios, whose inputs are connected in parallel and its output is taken single-ended. Amplitude and phase mismatch at the differential input are considered and it is shown that there is minimal effect on the output amplitude of the 2nd harmonic for a 5 dB difference in input amplitude and a 45° difference in phase. Under matched conditions, the implemented frequency doubler can be operated at a supply voltage as low as 1 V, which corresponded to a power consumption of less than 1 mW, has a 3 dB output bandwidth of 4 GHz and a conversion gain of 2.5 dB. At a supply voltage of 1.2 V, the frequency doubler consumed 1.32 mW, has a 3 dB output bandwidth of 3 GHz and a conversion gain of 5 dB. The phase niose degradation is 6 dB in both cases.

Multifunction silicon MMIC's for frequency conversion applications

The application of advanced silicon bipolar IC technology to multifunction microwave monolithic integrated circuits (MMICs) is demonstrated. The modeling, design, and testing of two silicon MMICs for frequency conversion applications are illustrated. The first product is a wideband frequency doubler with conversion gain, 20-dBc rejection of harmonics, and a 2-GHz bandwidth. The second product is a wideband vector demodulator (or image reject mixer) that utilizes an onchip digital frequency divider to generate 0 degrees and 90 degrees local oscillator (LO) phases from 0.05 to 1.5 GHz. Both products operate from a single 5-V supply, are load insensitive, require no external baluns, and are packaged in 180-mil hermetic packages. These frequency conversion MMICs and others currently under development have been prototyped on the analog silicon transistor array starCHIP-1, which is also described. >