Wet Etching Process Research Articles

Etch Profile Prediction Model Using Convolutional Neural Network

Etch profile control of the wafer surface is a key application for single-wafer wet process equipment. Wet etch processes are grouped into two types, either uniform flat etch profiles or specific non-flat etch profiles that are required for downstream processes. For both groups of etch profile it can consume time and resources to obtain the processing conditions to achieve the desired etch profile due to the complex interactions in the process. Etch profile prediction models can provide process engineers a valuable tool to identify processing conditions to get the desired etch profile in less time. In this paper, we introduce an etch profile prediction model using a Convolutional Neural Network [1] and validation of the prediction model against actual experimental data. We also investigated methods on how to select the comprehensive learning conditions and understand the relationship with prediction accuracy and the number of learning conditions. We found the choice of parameter type to describe a process condition can affect prediction accuracy. The prediction model reproduced the trend of etch profiles even when learned on a small dataset.

Reaction Mechanism Analysis of Si Selective Etching for Gate-All-Around Transistors by Molecular Simulations

The selective etching of Si in multi-stacked Si and SiGe structures is a key process to fabricate the next-generation of FET, Gate-all-around FET. In this study, we investigated the mechanism of wet chemical etching process at the molecular level for two common ionic solutions, potassium hydroxide (KOH) and tetramethylammonium hydroxide (TMAH). One of the important factors in the etching process is the reaction rate between the water and Si surface. Therefore, the water dynamics in i) bulk system and ii) Si wall confined system were mainly analyzed using molecular dynamics simulations. As a feature of bulk, TMAH showed the larger hydration structure around cation and the lower mobility of water in the hydration shell compared to KOH. In the Si wall confined system, the water and ion dynamics on the OH-terminated Si surface were distinctive. TMAH showed the lower mobility of water as in bulk system. Furthermore, the concentration and long stay of cation near the Si surface were observed in TMAH. This behavior of cation may directly prevent water from contacting surface. These characteristics of TMAH may slow down the Si etching process. However, if the blocking effect for etching depends on the surface composition, it will be useful for selective etching.

Controlled and Uniform Wet Etching of Molybdenum Nanowires

We achieved the controlled recess of molybdenum (Mo), which is alternative interconnect material for copper (Cu), by wet chemical etching. This wet etching process includes two main steps which are chemical oxidation of Mo and its subsequent dissolution, respectively. Firstly, Mo nanowires (NWs) are uniformly oxidized with potassium permanganate (KMnO4) solution in acetone. Secondly, the Mo oxide is dissolved using an aqueous solution of HCl. Mo NWs are characterized through transmission electron microscopy (TEM) imaging after each of the above steps. Cyclic etching experiments including oxidation and dissolution of Mo showed that Mo recess is linear and can be controlled for each cycle, where the etching produced the smooth Mo surface. This controlled Mo recess is crucial for the fabrication of next-generation metal interconnects.

Editors’ Choice—Atomic Layer Etching of Tungsten Disulfide Using Remote Plasma-Induced Oxidation and Wet Etching

WS2 is an emerging semiconductor with potential applications in next-generation device architecture owing to its excellent electrical and physical properties. However, the presence of inevitable surface contaminants and oxide layers limits the performance of WS2-based field-effect transistors (FETs); therefore, novel methods are required to restore the pristine WS2 surface. In this study, the thickness of a WS2 layer was adjusted and its surface was restored to a pristine state by fabricating a recessed-channel structure through a combination of self-limiting remote plasma oxidation and KOH solution etching processes. The reaction between the KOH solution and WOX enabled layer-by-layer thickness control as the topmost oxide layer was selectively removed during the wet-etching process. The thickness of the WS2 layer decreased linearly with the number of recess cycles, and the vertical etch rate was estimated to be approximately 0.65 nm cycle−1. Micro-Raman spectroscopy and high-resolution transmission electron microscopy revealed that the layer-by-layer etching process had a nominal effect on the crystallinity of the underlying WS2 channel. Finally, the pristine state was recovered by removing ambient molecules and oxide layers from the surface of the WS2 channel, which resulted in a high-performance FET with a current on/off ratio greater than 106. This method, which provides a facile approach to restoring the pristine surfaces of transition-metal dichalcogenide (TMDC) semiconductors with precise thickness control, has potential applications in various fields such as TMDC-based (opto)electronic and sensor devices.

Highly Responsive Near-Infrared Si/Sb2Se3 Photodetector via Surface Engineering of Silicon.

The development of imaging technology and optical communication demands a photodetector with high responsiveness. As demonstrated by microfabrication and nanofabrication technology advancements, recent progress in plasmonic sensor technologies can address this need. However, these photodetectors have low optical absorption and ineffective charge carrier transport efficiency. Sb2Se3 is light-sensitive material with a high absorption coefficient, making it suitable for photodetector applications. We developed an efficient, scalable, low-cost near-infrared (NIR) photodetector based on a nanostructured Sb2Se3 film deposited on p-type micropyramidal Si (made via the wet chemical etching process), working on photoconductive phenomena. Our results proved that, at the optimized thickness of the Sb2Se3 layer, the proposed Si micropyramidal substrate enhanced the responsivity nearly two times, compared with that of the Sb2Se3 deposited on a flat Si reference sample and a glass/Sb2Se3 sample at 1064 nm (power density = 15 mW/cm2). More interestingly, the micropyramidal silicon-based device worked at 0 V bias, paving a path for self-bias devices. The highest specific detectivity of 2.25 × 1015 Jones was achieved at 15 mW/cm2 power density at a bias voltage of 0.5 V. It is demonstrated that the enhanced responsivity was closely linked with field enhancement due to the Kretschmann configuration of Si pyramids, which acts as hot spots for Si/Sb2Se3 junction. A high responsivity of 47.8 A W-1 proved it suitable for scalable and cost-effective plasmonic-based NIR photodetectors.

Cavity Mode-Matching InGaN Aperture-Emitting Device with a Nanoporous GaN Reflector via Ion Implantation

Cavity mode-matching InGaN resonant-cavity light-emitting diodes (RC-LEDs) with aperture size-dependent emission have been demonstrated through nitrogen ion (N+) implantation and electrochemical wet etching processes. The RC-LED structure consisted of 570 nm-depth ion-implanted regions and an embedded 17-pair nanoporous-GaN/n-GaN distributed Bragg reflector (DBR) outside the aperture, while there existed a full 20-pair DBR structure within the aperture regions. Shorter and mode-matching cavity lengths were fabricated, confirmed by transmission electron microscopy and angle-resolved photoluminescence spectra inside the aperture area without subjecting to the N+ implantation. By reducing the aperture sizes, higher current density and narrower far-field electroluminescence emission patterns were observed in the RC-LED with an aperture size of 40 μm-diameter. These results demonstrate that the cavity mode-matching RC-LEDs with optical/electrical confinements and controllable cavity length mismatch features can be applied in a wide range of optoelectronic-based device applications.

Two coupled resonant-tunneling-diode oscillators with an air-bridged transmission line for high-power coherent terahertz radiation

We developed a two-coupled resonant-tunneling-diode (RTD) terahertz (THz) oscillator with a high output power to fill the THz gap. We arranged two RTD mesas in a low-loss air-bridged transmission line for strong mutual coupling and generation of a unique operation mode and integrated a planar ring-slot antenna for efficient THz radiation while satisfying the impedance matching condition. The device structure was fabricated using a multilayer resist process and a carefully controlled wet etching process. The fabricated device exhibited coherent operation and a high output power of approximately 0.24 mW at a high frequency of 925 GHz.

Selective Wet and Dry Etching of NiO over β-Ga2O3

Patterning of NiO/Ga2O3 heterojunctions requires the development of selective wet and dry etch processes. Solutions of 1:4 HNO3 :H2O exhibited measurable etch rates for NiO above 40 °C and activation energy for wet etching of 172.9 kJ.mol-1 (41.3 kCal.mol-1, 1.8 eV/atom), which is firmly in the reaction-limited regime. The selectivity over β-Ga2O3 was infinite for temperatures up to 55°C. The strong negative enthalpy for producing the etch product Ga(OH)4 suggests that HNO3-based wet etching of NiO occurs via the formation and dissolution of hydroxides. For dry etching, Cl2/Ar Inductively Coupled Plasmas produced etch rates for NiO up to 800Å.min-1, with maximum selectivities of < 1 over β-Ga2O3. The ion energy threshold for initiation of the etching of NiO was ~55 eV and the etch mechanism was ion-driven, as determined by the linear dependence of etch rate on the square root of ion energy incident on the surface.

Die-embedded packaging using Corning® multi-layered glass

Die-embedded (DE) packaging technologies in recent years have ventured into advanced packaging structures, such as fan-out wafer level packages (FOWLPs) or package-on-packages (PoPs). They offer higher density at lower costs, despite many challenges, such as the die-shift and warpage problems often observed during the molding process, caused by the high shrinkage and high coefficients of thermal expansion (CTEs) of the molding materials. This in turn makes it difficult to accurately mount the high-density fine-pitch bumps and adversely affects the overall yield, especially in processes using large-size substrates. Glass, known for its superior dimensional and thermal stability and its low or tunable CTEs, can be advantageous in reducing die-shift and warpages as opposed to other alternative material solutions for the molding process. In this paper, we propose a packaging solution based on a glass substrate incorporating a plurality of precisely dimensioned cavities, with a chip positioned in each cavity to prevent them from shifting during processing. Corning® Adaptive Formed Glass (AFG), a laminate glass with a unique clad/core/clad structure, allows for effectively forming cavities with high dimensional precision and positional accuracies as well as surface flatness through a wet etch process. Using a 0.5mm thick laminate Corning® AFG glass, we successfully designed and fabricated three types of DE packages with lab scale tools at Korea Electronics Technology Institute (KETI): single- and double-sided DE packages, and package-on-packages (POPs). High etching selectivity over 20:1, which was achieved by carefully designing the core and clad glass compositions, enabled a wet-etch cavity forming process with accurate cavity depths and flat bottom surfaces (&lt; ± 2.5μm) with relative ease. A double-sided DE package with a total thickness of 600μm was fabricated with two 125μm-thick IC chips, one embedded on each side of the substrate, and connected by metallized through glass vias (TGVs). A POP measured at 5.1×5.1×1.27 mm3 was also successfully demonstrated by using two built-in double-sided DE packages joined by flip-chip bonding, equivalent to stacking four layers of conventional single-sided DE packages. The double-sided DE packages and POPs presented in this paper are believed to be the world’s first demonstration on glass. The work also manifests the immense potential of Corning® AFG glass in enabling higher density IC packaging and large-size panel-level (or wafer-level) packaging.

Fabrication of Panel-Level Glass Substrates with Complete Design Freedom using LIDE

In this work, we present examples of highly reproducible, accurate and extremely cost-effective wafer- and panel-level fabrication of glass interposers, free of any process-dependent design limitations where any distribution and density of Through-Glass Vias (TGV) with any cross-section geometries and aspect-ratios, is possible. Glass has recently garnered significant interest for its many applications in the semiconductor packaging industry, particularly as a core substrate material for interposer applications. Glass has a unique set of material properties with great relevance for this industry, such as very high electrical resistivity, low loss tangent and low dielectric constant. Glass also exhibits low warpage due to its relatively low Young‘s Modulus while still being compatible with Silicon in terms of CTE and, when processed using a technology that doesn’t induce the generation of any defects such as microcracks or thermally-induced stress, it is highly reliable during processing and operation. Laser Induced Deep Etching (LIDE®) technology is a 2.5D glass processing technology with complete design freedom purposedly developed for cost-effective, high-volume fabrication of defect-free glass components. Despite its many advantages as an interposer material in relation to Si, its application has been hindered by the lack of reliable, precise, and cost-effective processing technologies. LIDE® consists of a two-step process: i) a very fast maskless and direct-write laser process induces subtle and very localized modification in the glass substrate, requiring a single laser pulse to modify the whole glass thickness; and ii) a wet-etching process done in batch, where the whole glass substrate is subjected to the action of an etchant and where the removal of glass occurs at an accelerated rate in the laser-modified regions. This process flow allows LIDE to fabricate several thousands of TGV per second, completely free of any defects, with a sub-micron point-to-point accuracy and ± 5 µm accuracy (cumulative) across a 510 mm x 515 mm glass panel (Cp &gt; 1.33), in any glass type, with aspect-ratios from 1:10 to 1:50 (diameter:depth).

Recess-Free E-Mode AlGaN/GaN MIS-HFET with Crystalline PEALD AlN Passivation Process

We utilized a plasma-enhanced atomic layer deposition (PEALD) process to deposit an AlN passivation layer on AlGaN/GaN surface to enhance the polarization effects, which enabled the fabrication of an enhancement-mode (E-mode) AlGaN/GaN metal-insulator-semiconductor heterojunction field-effect transistor (MIS-HFET) without the need for a gate recess process. The AlN film deposited by PEALD exhibited a crystalline structure, not an amorphous one. The enhanced polarization effect of introducing the PEALD AlN film on a thin AlGaN barrier was confirmed through electrical analysis. To fabricate the E-mode AlGaN/GaN MIS-HFET, the PEALD AlN film was deposited on a 4.5 nm AlGaN barrier layer and then a damage-free wet etching process was used to open the gate region. The MIS-gate structure was formed by depositing a 15 nm plasma-enhanced chemical vapor deposition (PECVD) silicon dioxide (SiO2) film. The fabricated thin-AlGaN/GaN MIS-HFET demonstrated successful E-mode operation, with a threshold voltage of 0.45 V, an on/off ratio of approximately 109, a specific on-resistance of 7.1 mΩ·cm2, and an off-state breakdown voltage exceeding 1100 V.

Conductometric gas sensor based on p-type GaN hexagonal pits /PANI for trace-level NH3 detection at room temperature

Herein, we demonstrate two ammonia (NH3) gas sensors based on p-type Gallium nitride (GaN) hexagonal pits (GaN-HP)/ Polyaniline (PANI) heterostructure prepared by wet etching process and in situ polymerization. The morphologies, structures of p-type GaN-HP/PANI sensors based on planer p-type GaN with etching time for 20 min and 30 min (GaN-HP/PANI-1 and GaN-HP/PANI-2) have been characterized. The responses of GaN-HP/PANI-1 and GaN-HP/PANI-2 are 3.2 and 6.3 times higher than that of pure PANI at room temperature, which is primarily due to the gas sensing improvement effect of p-p junction between p-type GaN-HP and PANI. Moveover, the GaN-HP/PANI-2 shows 1.94-fold enhancement in the gas sensing response toward 100 ppm NH3 and lower detection limits than that of GaN-HP/PANI-1, indicating that its performance is highly dependent on the etching time. Compared to GaN-HP/PANI-1, the excellent improvement of gas sensing for GaN-HP/PANI-2 can be attributed to the higher specific surface area, the stronger protonation degree of PANI and synergistic effects of the p-p junction effect. Furthermore, the selectivity, repeatability and the effect of relative humidity on the gas sensing performances of the two both sensors have also been explored. This work can provide a helpful reference for development of high-performance GaN-HP/PANI based gas sensors.

Demonstration of GaN:Eu/GaN nanowire light emitting diodes grown by selective-area organometallic vapor phase epitaxy

We report on the demonstration of GaN:Eu/GaN nanowire (NW) LEDs grown by organometallic vapor phase epitaxy (OMVPE). The GaN:Eu/GaN NW LED structures with a large aspect ratio (>8) are formed by selective-area OMVPE, and have pedestals that are free from lateral overgrowth of p-GaN in order to prevent short circuiting. The structures are embedded in polydimethylsiloxane followed by a wet-etching process to expose the tips of NW LEDs for contacting. Red luminescence with a narrow linewidth originating from Eu3+ ions is observed at room temperature under current injection in the GaN:Eu/GaN NW LEDs.

Strain relaxation of semiconductor membranes: insights from finite element modeling

Finite element (FE) models were employed to better understand the process used to fabricate elastically strain-relaxed in-place bonded semiconductor membranes for application as engineered substrates for semiconductor devices (Cohen et al 2005 Appl. Phys. Lett. 86 251902; Owen et al 2008 ECS Trans. 16 271; Owen et al 2009 Sci. Technol. 24 035011; Mooney et al 2014 Semicond. Sci. Technol. 29 075009; Salehzadeh et al 2014 Semicond. Sci. Technol. 29 085002). Initial structures consist of a compressively strained, square semiconductor membrane atop a sacrificial layer that is subsequently removed by etching in an hydrofluoric acid (HF) solution. Elastic relaxation of the compressive strain bends the free area of the membrane toward the substrate. But for the dimensions of most of the structures employed in the fabrication of in-place bonded membranes, the bending by elastic strain relaxation alone is not sufficient for the membrane corners to contact the substrate. FE models, therefore, confirm that an attractive force between the surface of the membrane and the surface of the substrate in the HF solution must act to hold the membrane in place during the wet etching process. FE models also confirm that in the etch solution the interface between the membrane and the substrate must be a sliding interface in order for the membrane to lie flat on the substrate once the sacrificial layer has been completely removed.

InGaN Laser Diodes with Etched Facets for Photonic Integrated Circuit Applications

The main objective of this work is to demonstrate and validate the feasibility of fabricating (Al, In) GaN laser diodes with etched facets. The facets are fabricated using a two-step dry and wet etching process: inductively coupled plasma-reactive ion etching in chlorine, followed by wet etching in tetramethylammonium hydroxide (TMAH). For the dry etching stage, an optimized procedure was used. For the wet etching step, the TMAH temperature was set to a constant value of 80 °C, and the only variable parameter was time. The time was divided into individual steps, each of 20 min. To validate the results, electro-optical parameters were measured after each step and compared with a cleaved reference, as well as with scanning electron microscope imaging of the front surface. It was determined that the optimal wet etching time was 40 min. For this time, the laser tested achieved a fully comparable threshold current (within 10%) with the cleaved reference. The described technology is an important step for the future manufacturing of photonic integrated circuits with laser diodes integrated on a chip and for ultra-short-cavity lasers.

Fabrication of ultrahigh aspect ratio Si nanopillar and nanocone arrays

High aspect ratio (HAR) structures have many promising applications such as biomedical detection, optical spectroscopy, and material characterization. Bottom-up self-assembly is a low-cost method to fabricate HAR structures, but it remains challenging to control the structure dimension, shape, density, and location. In this paper, an optimized top-down method using a combination of pseudo-Bosch etching and wet isotropic thinning/sharpening is presented to fabricate HAR silicon (Si) nanopillar and nanocone arrays. To achieve these structure profiles, electron beam lithography and reactive ion etching were carried out to fabricate silicon pillars having a nearly vertical sidewall, followed by thinning or sharpening by wet etching with a mixture of hydrofluoric (HF) acid and nitric acid (HNO3). For the dry etching step using the pseudo-Bosch process, the sidewall angle is largely dependent on the SF6/C4F8 gas flow ratio, and it was found that a vertical profile can be attained with a ratio of 22/38. For the wet etching process, a very large HNO3/HF volume ratio is shown to give smooth etching with a slow and controllable etching rate. The final structure profile also depends on the pattern density/array periodicity. When the array period is large, silicon nanopillar is thinned down, and its aspect ratio can reach 1:135 with a sub-100 nm apex. When the pillar array becomes very dense (periodicity much smaller than height), a very sharp nanocone structure is obtained after wet etching with an apex diameter under 20 nm.

Ultraviolet-C AlGaN Resonant-Cavity Light-Emitting Diodes with Thermal Stability Pipe-AlGaN-Distributed Bragg Reflectors.

Ultraviolet-C AlGaN resonant-cavity light-emitting diodes with top and bottom pipe-AlGaN-distributed Bragg reflectors (DBRs) have been demonstrated. For the top/bottom DBR structures, 20 pairs of n+-AlGaN:Si/n-AlGaN:Si stack structures were transformed into the pipe-AlGaN:Si/n-AlGaN:Si DBRs through a doping-selective electrochemical wet etching process. The reflectivity of the pipe-AlGaN DBR structure was measured as 90% at 276.7 nm with a 20.9 nm flat stopband width. The anisotropic optical properties of the pipe-AlGaN DBR structure had been analyzed through the polarization-dependent reflectance spectra. For temperature-dependent reflectance spectra, the central wavelengths were slightly redshifted from 275 nm (100 K) to 281 nm (600 K) due to thermal expansion, refractive index increase, and partial strain release phenomena in the pipe-DBR structure. High photoluminescence emission intensity and line-width reducing phenomena were observed at 10 K in the UVC-LED with the resonant-cavity structure, which has potential for high-efficiency UV-C light source applications.

Vertical Etching of Scandium Aluminum Nitride Thin Films Using TMAH Solution.

A wide bandgap, an enhanced piezoelectric coefficient, and low dielectric permittivity are some of the outstanding properties that have made ScxAl1-xN a promising material in numerous MEMS and optoelectronics applications. One of the substantial challenges of fabricating ScxAl1-xN devices is its difficulty in etching, specifically with higher scandium concentration. In this work, we have developed an experimental approach with high temperature annealing followed by a wet etching process using tetramethyl ammonium hydroxide (TMAH), which maintains etching uniformity across various Sc compositions. The experimental results of etching approximately 730 nm of ScxAl1-xN (x = 0.125, 0.20, 0.40) thin films show that the etch rate decreases with increasing scandium content. Nevertheless, sidewall verticality of 85°~90° (±0.2°) was maintained for all Sc compositions. Based on these experimental outcomes, it is anticipated that this etching procedure will be advantageous in the fabrication of acoustic, photonic, and piezoelectric devices.

A two-step wet etching process of PZT thin film with ultra-low undercut for MEMS applications

Wet etching methods of lead zirconate titanate (PZT) film suffer from high residual risk and severe undercut erosion. In this study, a two-step etching approach replace with the traditional concept of multi-acid mixing etchant, which increases the precision of PZT film and fixes the residual issues that were difficult to avoid in the conventional scheme. The two-step etching of the PZT film's mechanism is investigated using XRD and TEM. The impact of the etchant's composition ratio on the etching effect is demonstrated, and the ideal process range and debugging direction can be accurately identified. The undercut ratio (0.62) of the etching method proposed in this study is substantially lower than that in prior studies. In addition, the etching rate and selectivity between photoresists are 60 nm/s and 1.14, respectively. The sidewall forms an inclined plane of around 30 degrees due to the crystal orientation dependent etch rates. The results of the polarization hysteresis loop demonstrate that there is no significant performance loss before and after the wet etching process. A two-step wet etching process of PZT thin film with ultra-low undercut ratio (0.62) is developed. The baseline recipe with a high etch rate, and the selectivity with photoresist is 1.14, and the sidewalls etch into an inclined plane of about 30 degrees. • A new two-step wet etching recipe for PZT film, which use different etchant to etch different phases in PZT film, obtains ultra-low undercut ratio (0.62) and does not generate residual risk, has been developed. • Experimental results have demonstrated that ultra-low undercut, high etch rate, no residual and high selectivity can be simultaneously achieved without using any special processing condition. • Etch results with different acid concentrations in different etchant, processing phenomenon analysis with XRD and TEM, and Interpretation of the etching process and comparison of ferroelectric parameters for the results before and after etching, which can be proven suitability for various etching purposes.

Resonance characteristics and energy losses of an ultra-high frequency ZnO nanowire resonator

An ultra-high frequency (UHF, 300 MHz∼3 GHz) nano mechanical resonator based on defect-free zinc oxide nanowire (ZnO NW) was fabricated through a top-down processing method. Using UHF detection technology based on a lock-in amplifier, through optimized measurement of high-performance equipment, it was detected at room temperature that the ZnO NW resonator could operate at a resonance frequency of nearly 650 MHz and a quality factor Q ≈ 1000∼2500, and its force sensitivity could reach 1 f N·Hz−1/2. The deformation, driving force and first-order resonance frequency of the resonator were calculated using the continuum model and compared with the experimental data. The resonance characteristics of ZnO NW resonators under piezoelectric excitation were analyzed and compared with that under electromagnetic excitation. The effects of various loss factors on the resonance characteristics were analyzed, with emphasis on the generation mechanism of piezoelectric loss, clamping loss and eddy current loss and their effects on quality factor and force sensitivity. The ZnO NWs used in this paper have piezoelectric effect, which is rare in other NWs, and are difficult to be fabricated in a bottom-up manner. And experiments show that for ZnO NWs resonators, piezoelectric excitation has obvious advantages in Q value compared with electromagnetic excitation. Unlike the bottom-up wet etch processing method, the resonant beam structure is well protected by the top-down processing method to reduce internal defects, and the top-down fabrication method is easier to integrate into the fabrication process of integrated circuits, which provides great potential for the applications of NW resonators, such as quantum electromechanical systems and high-frequency signal processing.