Wet Etching Research Articles

Effect of N <sub>2</sub>O treatment on performance of back channel etched metal oxide thin film transistors

In this paper, the rare earth element praseodymium-doped indium tin zinc oxide semiconductor is used as the channel layer of the thin film transistor, and the aluminum oxide-based wet back channel etched thin film transistor is successfully prepared. The effect of N <sub>2</sub>O plasma treatment on the back-channel interface of thin film transistor is studied, and the effect of treatment power and time on device performance are studied in detail. The results show that the good device performance can be obtained under certain power and time treatment, and the prepared device has good thermal stability of positive bias and negative bias under light conditions. The results from high-resolution transmission electron microscopy show that the amorphous structure of the metal oxide semiconductor material can effectively resist the wet etchant, and that no obvious component segregation phenomenon is found. Further, X-ray photoelectric spectroscopy tests show that N <sub>2</sub>O plasma treatment can form an oxygen-rich, low-carrier-concentration interface layer at the interface. On the one hand, it can effectively resist the damage of the back channel caused by the plasma of plasma enhanced chemical vapor deposition (PECVD), and on the other hand, it acts as a passivation body of hydrogen from PECVD plasma, suppressing the generation of low-level donor state of hydrogen. This study provides an important reference for low-cost, high-efficiency thin film transistor performance optimization methods.

Delamination of polyimide in hydrofluoric acid

Wet etching is a critical fabrication step for the mass production of micro and nanoelectronic devices. However, when an extremely corrosive acid such as hydrofluoric (HF) acid are used during etching, an undesirable damage might occur if the device includes a material that is not compatible with the acid. Polyimide thin films can serve as sacrificial/structural layers to fabricate freestanding or flexible devices. The importance of polyimide in microelectronics is due to its relatively low stress and compatibility with standard micromachining processes. In this work, a fast delamination process of a 4-μm-thin film of polyimide from a silicon substrate has been demonstrated. The films’ detachment has been performed using a wet-based etchant of HF acid. Specifically, the effect of HF concentration on the delamination time required to detach the polyimide film from the substrate has been investigated. This study is intended to provide the information on the compatibility of using polyimide films with HF, which can help in the design and fabrication of polyimide-based devices.

Second Iteration of Slotted Fractal Log Periodic Dipole Antenna for UHF Digital TV Band Application

This paper discusses the simulations and measurements of the antenna with and without slot implementation in terms of reflection coefficient (S11) and radiation pattern. The slot implementation on each of the radiating elements on the 2nd iteration log periodic fractal Koch antenna (LPFKA) was described in this paper. This method is utilised to reduce the antenna's size while also preventing the lower designated frequencies from shifting to the higher band as the iteration increases. The antenna is designed to test and observe performance in the Ultra High Frequency (UHF) band, which ranges from 0.5 GHz to 3.0 GHz. Computer Simulation Technology (CST) software is used to design and model the antenna, which was then built using the wet etching technique. The antenna's substrate is made of FR-4 laminated board with a dielectric constant of 4.6, tangent loss of 0.019, and a thickness of 1.6mm. The results demonstrate good agreement, with a steady radiation pattern over the operational bandwidth and a reflection coefficient of less than -10 dB for the frequency range of interest. The antenna is being tested with Digital TV decoder and the result is observed towards the picture of the Digital TV.

H3PO4-based wet chemical etching for recovery of dry-etched GaN surfaces

The impact of several wet etchants commonly encountered in the microelectronic industry on the surface chemistry of GaN on silicon was explored. In order to get closer to fully recessed gate HEMT fabrication processes, we investigated different kinds of GaN surfaces. This study was conducted on as-grown GaN and dry etched GaN, with etching consisting of inductive coupled plasma reactive ion etching (ICP-RIE), followed by atomic layer etching (ALE) and O2 plasma stripping. The impact of each wet treatment was evaluated by parallel Angle Resolved X-ray Photoelectron Spectroscopy (pAR-XPS). Treatment with phosphoric acid (H3PO4) showed a significant modification of the surface and further studies were performed using this treatment. The impact of H3PO4 on GaN surface chemistry and morphology was assessed by pAR-XPS and atomic force microscopy (AFM) respectively. A delayed effect was observed for dry etched samples compared to as-grown samples, with a successful recovery of the surface after 60 min of treatment. We also proposed a mechanism explaining the progressive formation on steps on the surface over time. Further research was performed on dry etched samples without ALE which also modified the delay time of the H3PO4 treatment, but still enabled a recovery of the surface morphology. In contrast to other studies, we showed that, with the appropriate choice of parameters for the H3PO4 treatment, it was possible to successfully recover the GaN surface after dry etching without significantly opening dislocation holes. This is therefore a promising treatment to be used during GaN HEMT processing to recover good quality surfaces after etching.

Chemical etching of glasses in hydrofluoric Acid: A brief review

The removal of material, selectively or non-selectively, from the surface of glasses by using acidic, caustic, or abrasive chemicals is referred to as glass etching. Wet and dry etchings are extensively used for variety of applications, including flow channel designs in fuel cell electrodes. Since precise micro-level etching is challenging, optimization of the etching parameters is important. This paper reviews wet etching of glasses including fused quartz for formation of microchannels and microstructures for a variety of applications. The review also discusses different etch mechanisms including etch parameters and surface microstructure of the etched glass. It is found that HF concentration and etching time play a major role on the resulting surface microstructure of glass materials. The paper also describes the use of HF buffered with NH4F solutions to improve the quality of the etched surface.

Pre-metal dielectric PE TEOS oxide pitting in 3D NAND: mechanism and solutions

In 3D NAND, as the stack number increases, the process cost becomes higher and higher, and the stress problem becomes more and more serious. Therefore, the low cost and low stress plasma enhanced tetraethyl orthosilicate (PE TEOS), compared to high density plasma (HDP) oxide, shows its superiority as pre-metal dielectric (PMD) oxide layer in 3D NAND. This paper explores the challenges in the application of PE TEOS in 3D NAND PMD oxide layer. In our experiment both PE TEOS and HDP are employed as the PMD oxide for 3D NAND staircase protection. There is not any void found in the two oxide structures. However, oxide pitting is spotted in the subsequent diluted hydrofluoric acid wet etching in the PE TEOS split. Moreover, we observe that the top silicon nitride corrodes in hot phosphoric acid. We study the mechanism of PE TEOS oxide pitting and silicon nitride corroding, propose two solutions: (1) HDP oxide + PE TEOS, and (2) PE TEOS + dry etching. Experimental results demonstrate that our solutions can well address the issue of PE TEOS oxide pitting and effectively protect the staircase structure. This work extends the application of PE TEOS oxide of which the cost and the stress are both low in 3D NAND.

Ultra-Low-Reflective, Self-Cleaning Surface by Fabrication Dual-Scale Hierarchical Optical Structures on Silicon

An integrated functional anti-reflective surface is of great significance for optical and optoelectronic devices. Hence, its preparation has attracted great attention from many researchers. This study combined wet alkaline etching approaches and reactive ion etching (RIE) techniques to create a dual-scale hierarchical anti-reflective surface on silicon substrates. The effect of RIE time on surface morphology and optical performance was investigated using multiple characterization forms. The optimal parameters for the fabrication of dual-scale structures by the composite etching process were explored. The silicon surface with a dual-scale structure indicated excellent anti-reflective properties (minimum reflectivity of 0.9%) in the 300 to 1100 nm wavelength range. In addition, the ultra-low reflection characteristic of the surface remained prominent at incident light angles up to 60°. The simulated spectra using the finite difference time domain (FDTD) method agreed with the experimental results. Superhydrophobicity and self-cleaning were also attractive properties of the surface. The functionally integrated surface enables silicon devices to have broad application prospects in solar cells, light emitting diodes (LEDs), photoelectric detectors, and outdoor equipment.

Demonstration of using HF-etchant mixed into CO2 to lift-off thin-film GaAs layers by supercritical fluid technology

The epitaxial lift-off (ELO) process based on selectively etching a thin sacrificial AlAs layer from GaAs substrate was performed using high-concentrated aqueous hydrofluoric (HF) etchant. However, because of using the wet etching method, the traditional ELO process has many drawbacks and limitations. Supercritical fluids (SCFs) naturally have the characteristics of low viscosity, high diffusivity, and zero surface tension. Therefore, the development of a gas-phase-like dry etching method based on mixing HF into CO2 and operating the mixture of HF/CO2 in SCFs condition as etchant is hereby proposed to overcome those bottlenecks existing in traditional wet ELO processes. However, there are no available experimental results for etching AlAs layers by HF in SCFs yet. Therefore, a HF-compatible corrosion-resistant high-pressure system was designed and built up to perform the idea. The capabilities of etching sample in supercritical CO2 (scCO[Formula: see text] had been systemically investigated under various pressures (2000–3000 psi) and temperatures (40–60[Formula: see text]C). Besides, the etching performances separately conducted by using aqueous-HF and anhydrous HF/Pyridine as the source etchant and mixing with scCO2 at a fixed temperature, pressure and etching time were also examined and compared under different equivalent HF concentrations. An evaluation of using acetone as the co-solvent mixed with HF/scCO2 mixture for enhancing the etch rate in different volume ratio of HF/co-solvent was further investigated and discussed. With this system, we demonstrate releasing a size of [Formula: see text] ([Formula: see text]) and 3 [Formula: see text]m-thick free-standing GaAs sheet from a 150 nm AlAs sacrificial layer by the etching sample in HF/scCO2 mixture. The released GaAs sheet was also successfully transferred to a flexible PET substrate by using a PDMS stamp and an adhesive layer of NOA61.

Surface Modification of Additively Manufactured Nitinol by Wet Chemical Etching.

Three-dimensional printed nitinol (NiTi) alloys have broad prospects for application in medicine due to their unique mechanical properties (shape memory effect and superplasticity) and the possibilities of additive technologies. However, in addition to mechanical properties, specific physicochemical characteristics of the surface are necessary for successful medical applications. In this work, a comparative study of additively manufactured (AM) NiTi samples etched in H2SO4/H2O2, HCl/H2SO4, and NH4OH/H2O2 mixtures was performed. The morphology, topography, wettability, free surface energy, and chemical composition of the surface were studied in detail. It was found that etching in H2SO4/H2O2 practically does not change the surface morphology, while HCl/H2SO4 treatment leads to the formation of a developed morphology and topography. In addition, exposure of nitinol to H2SO4/H2O2 and HCl/H2SO4 contaminated its surface with sulfur and made the surface wettability unstable in air. Etching in NH4OH/H2O2 results in surface cracking and formation of flat plates (10–20 microns) due to the dissolution of titanium, but clearly increases the hydrophilicity of the surface (values of water contact angles are 32–58°). The etch duration (30 min or 120 min) significantly affects the morphology, topography, wettability and free surface energy for the HCl/H2SO4 and NH4OH/H2O2 etched samples, but has almost no effect on surface composition.

Enhancing SERS Intensity by Coupling PSPR and LSPR in a Crater Structure with Ag Nanowires

The sensitive characteristics of surface-enhanced Raman scattering (SERS) can be applied to various fields, and this has been of interest to many researchers. Propagating surface plasmon resonance (PSPR) was initially utilized but, recently, it has been studied coupled with localized surface plasmon resonance that occurs in metal nanostructures. In this study, a new type of metal microstructure, named crater, was used for generating PSPR and Ag nanowires (AgNWs) for the generation of LSPR. A crater structure was fabricated on a GaAs (100) wafer using the wet chemical etching method. Then, a metal film was deposited inside the crater, and AgNWs were uniformly coated inside using the spray coating method. Metal films were used to enhance the electromagnetic field when coupled with AgNWs to obtain a high SERS intensity. The SERS intensity measured inside the crater structure with deposited AgNWs was up to 17.4 times higher than that of the flat structure with a deposited Ag film. These results suggest a new method for enhancing the SERS phenomenon, and it is expected that a larger SERS intensity can be obtained by fine-tuning the crater size and diameter and the length of the AgNWs.

Dps protein localization studies in nanostructured silicon matrix by scanning electron microscopy

The present work is related to the microscopic studies of the morphology of the planar and inner part of silicon nanowires arrays before and after immobilization with a natural nanomaterial, Dps protein of bacterial origin. Silicon nanowires were formed by metal-assisted wet chemical etching. To obtain the recombinant protein, Escherichia coli cells were used as excretion strain and purification were carried out using chromatography. The combination of silicon nanowires with protein molecules was carried out by layering at laboratory conditions followed by drying under air. The resulting hybrid material was studied by high-resolution scanning electron microscopy. Studies of the developed surface of the nanowires array were carried out before and after combining with the bioculture. The initial arrays of silicon wireshave a sharp boundaries in the planar part and in the depth of the array, transition layers are not observed. The diameter of the silicon nanowires is about 100 nm, the height is over a micrometer, while the distances between the nanowires are several hundred of nanometers. The pores formed in this way are available for filling with protein during the immobilization of protein.The effectiveness of using the scanning electron microscopy to study the surface morphology of the hybrid material “silicon wires – bacterial protein Dps” has been demonstrated. It is shown that the pores with an extremely developed surface can be combined with a bio-material by deposition deep into cavities. The protein molecules can easily penetrate through whole porous wires matrix array. The obtained results demonstrate the possibility of efficient immobilization of nanoscaled Dps protein molecules into an accessible and controllably developed surface of silicon nanowires.

Back-Channel Etched In-Ga-Zn-O Thin-Film Transistor Utilizing Selective Wet-Etching of Copper Source and Drain

The electrical performance of the back-channel etched Indium–Gallium–Zinc–Oxide (IGZO) thin-film transistors (TFTs) with copper (Cu) source and drain (S/D) which are patterned by a selective etchant was investigated. The Cu S/D were fabricated on a molybdenum (Mo) layer to prevent the Cu diffusion to the active layer (IGZO). We deposited the Cu layer using thermal evaporation and performed the selective wet etching of Cu using a non-acidic special etchant without damaging the IGZO active layer. We fabricated the IGZO TFTs and compared the performance in terms of linear and saturation region mobility, threshold voltage and ON current (ION). The IGZO TFTs with Mo/Cu S/D exhibit good electrical properties, as the linear region mobility is 12.3 cm2/V-s, saturation region mobility is 11 cm2/V-s, threshold voltage is 1.2 V and ION is 3.16 × 10−6 A. We patterned all the layers by a photolithography process. Finally, we introduced a SiO2-ESL layer to protect the device from external influence. The results show that the prevention of Cu and the introduced ESL layer enhances the electrical properties of IGZO TFTs.

A study of gate recess-width control of InP-based HEMTs by a Si3N4 passivation layer

Recess process for opening a narrow trench in the capping layer for T-shaped gates is one of the most important steps in the fabrication of InP-InAlAs/InGaAs based high electron mobility transistors, since the recessed-width strongly influences the DC/RF performances of the devices. Conventional chemical wet etch fails to well control the recess-width and its uniformity, leaving the seemingly small issue still rarely addressed so far. This work quantitatively analyzed the relationship between the recess-width and the DC/RF properties of the device by numerical simulations. To enhance the controllability of the recess-width, a 20-nm thick Si3N4 passivation layer pre-grown on the top of the capping layer was proposed. Careful comparisons of the recess-width as well as the device property with and without the passivation layer was carried out. Our results from both experiments and simulations indicate that it is promisingly feasible to control the recess-width to the desired scale by chemical wet etch when a dielectric layer such as Si3N4 is applied to protect the InGaAs capping layer from being over recessed, leading to enhanced device performance. With such an additional Si3N4 passivation layer, it is expected that the manufacturing yield of the InP-based high electron mobility transistors should be significantly enhanced with improved device performances.

Fabrication of microchannel and diaphragm for a MEMS acoustic sensor using wet etching technique

This paper reports a new technique for fabrication of diaphragm and microchannel in a single step for the development of a piezoelectric MEMS acoustic sensor. It describes the design of the sensor based on ZnO to be utilized for aero-acoustic measurements. A primary requirement for such devices is a high maximum sound pressure level [(SPL) ~180 dB] and flat frequency response in the audio band (20 Hz - 20 kHz). The Si-diaphragm thickness was optimized for the desired SPL range using Coventorware. The complete frequency response of the structure was determined using analytical formulations based on lumped element modeling (LEM). The fabricated device was tested using Laser Doppler Vibrometer (LDV). The lower cut-off frequency, bandwidth, resonance frequency and flat band sensitivity of the optimized device have been found to be 26.3 Hz, 40.0 kHz, 78.688 kHz and 148 μV/Pa respectively.

Highly Stacked GeSi Nanosheets and Nanowires by Low-Temperature Epitaxy and Wet Etching

The eight stacked Ge <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.75</sub> Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.25</sub> nanosheets, the seven stacked Ge <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.95</sub> Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.05</sub> nanowires, and the six stacked Ge <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.95</sub> Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.05</sub> nanowires without parasitic channels are demonstrated. These highly stacked channels are made from 18 epilayers consisting of a Ge buffer, nine heavily P-doped Ge sacrificial layers, and eight GeSi channel layers with the low growth temperature (350 °C and 375 °C) to ensure the entire epilayers metastable without dislocations in the channels. The isotropic wet etching by H <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> and NH <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sub> OH + H <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> is used for the channel release and the removal of the parasitic channels, respectively. The delicate interplay between epilayer design and wet etching is implemented to fabricate the highly stacked GeSi channels. High inter-channel uniformity of the eight stacked Ge <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.75</sub> Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.25</sub> nanosheets is obtained due to the superior etching selectivity. High <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{\mathrm{\scriptscriptstyle ON}}$ </tex-math></inline-formula> per stack and per footprint of the seven stacked Ge <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.95</sub> Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.05</sub> nanowires and the six stacked Ge <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.95</sub> Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.05</sub> nanowires without parasitic channels are achieved due to the high mobility <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${L}_{4}$ </tex-math></inline-formula> valleys and nanowire conduction. The reduced subthreshold slope (SS) and improved <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{\mathrm{\scriptscriptstyle ON}} / {I}_{\mathrm{\scriptscriptstyle OFF}}$ </tex-math></inline-formula> are obtained by parasitic channel removal. The record <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{\mathrm{\scriptscriptstyle ON}}$ </tex-math></inline-formula> of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$120~\boldsymbol \mu \text{A}$ </tex-math></inline-formula> per stack ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$4600~\boldsymbol \mu \text{A} / \boldsymbol \mu \text{m}$ </tex-math></inline-formula> per channel footprint) at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\mathrm{\scriptscriptstyle OV}} = {V}_{\mathrm{\scriptscriptstyle DS}} = 0.5$ </tex-math></inline-formula> V is reached among reported Ge/GeSi 3-D nFETs.

Single-step alkaline etching of deep silicon cavities for chip-scale atomic clock technology

This paper presents the results of experiments on the development of the technology of MEMS alkali vapor cells for a miniature quantum frequency standard. The classical design of a two-chamber silicon cell containing an optical chamber, shallow filtration channels and a technical container for a solid-state alkali source was implemented in a single-step process of wet anisotropic silicon etching. To prevent the destruction of the filtration channels during etching of the through silicon cavities, the shapes of the compensating structures at the convex corners of the silicon nitride mask were calculated and the composition of the silicon etchant was experimentally found. The experiments results were used in the manufacture of chip-scale atomic clock cells containing vapors of 87Rb or 133Cs isotopes in the neon atmosphere.

A 0.43 V/90 nA/mm Lateral AlGaN/GaN Schottky Barrier Diode With Plasma-Free Groove Anode Technique

In this letter, high-performance AlGaN/GaN Schottky barrier diodes (SBDs) with a great balance between forward and reverse characteristics are demonstrated. Benefiting from a plasma-free, low-damaged wet etching technique of an AlGaN layer at the anode region and low work-function tungsten (W) as the anode, lateral GaN SBDs with a low turn-on voltage (<inline-formula> <tex-math notation="LaTeX">$\text{V}_{{\mathrm {T}}}$ </tex-math></inline-formula>) of 0.43 V and a low reverse current (<inline-formula> <tex-math notation="LaTeX">$\text{I}_{{\mathrm {R}}}$ </tex-math></inline-formula>) of 90 nA/mm are obtained. Meanwhile, owing to the flattened self-terminated etching surface and the assistance of SiN passivation grown by low-pressure chemical vapor deposition, a high breakdown voltage of 1.83 kV and a power figure-of-merit (FOM) of 1.20 GW/cm² are achieved for the fabricated GaN SBD with a spatial distance (<inline-formula> <tex-math notation="LaTeX">$\text{L}_{{\mathrm {AC}}}$ </tex-math></inline-formula>) of <inline-formula> <tex-math notation="LaTeX">$15 ~\mu \text{m}$ </tex-math></inline-formula> from cathode to anode. The lateral GaN SBD fabricated with the optimized wet etching technique shows great potential for next-generation power electronics.

Vertical Hybrid Integration Devices Using Selectively Defining Underneath Si Waveguide

3D hybrid integration based on III-V/Si waveguides by selective undercut wet etching (SUWE) of the lower Si layer has been demonstrated on a silicon-on-insulator (SOI) template. The process was performed on an adhesive-bonding material structure, defined by the upper InP/InAlGaAs (InAlGaAs quantum well) p-i-n heterostructure and the lower 220 nm SOI. After the top p-i-n III-V tapered waveguide was first fabricated and covered by Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sub> , KOH was then used for SUWE of Si layer from SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> and Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sub> , forming the bottom SOI single-mode waveguide. In comparison to monolithic III-V waveguide structure (InP based material), the simulated confinement factor of active region shows an enhancement from 10.3% to 16.7%. SOA/EAM devices were also processed and integrated in III-V layer, showing 7.2 dB optical gain at 70 mA injection current in SOA and 21.7 dB extinction ratio within 0~−2 V swing voltage in EAM. The strong quantum confined Stark effect (QCSE) in MQW confirms the improved confinement factor. It suggests a vertical self-alignment scheme could be used for realizing compact and submicron scale heterogeneous integration in a Si photonics template.

Foam-like GaN: Study on the controlled tuning of pore size by R group change in amino acid etchant and its ultra-high photocurrent response

Relative to ionic liquids, in addition to mild physical and chemical properties, and are environmentally friendly, amino acids possess a smaller molecular weight as well. Herein, we developed a foamed GaN (F-GaN) nanostructures with uniform appearance and smooth pore wall, which prepared by the photoelectrochemical etching (PECE) in amino acid etchant. The controlled adjustment of the average pore size from 27.33 nm to 56.41 nm was achieved by the change of R group, verifying the amino acids with different molecular weight can effectively adjust the pore size of the F-GaN. In addition, the highest pore density was estimated to 1.34 × 1011 cm−1, which reached a peak value in the field of GaN wet etching ever before. Importantly, the highest photocurrent of the as-obtained F-GaN was 21 times than the planar GaN, which demonstrated F-GaN nanostructures had great potential in the photoelectric and optical devices.

High-aspect-ratio ZnSe microstructure generated by spatially shaped femtosecond laser writing assisted with wet chemical etching

A high-aspect-ratio microstructure in polycrystalline Zinc selenide (ZnSe) is important for waveguides and photonic crystals application. In this work, we demonstrated a successful approach for fabricating microstructure with Bessel beam inscription and etching using a mixed solution of hydrogen peroxide (H2O2) and ammonia hydroxide (NH4OH). The microstructure inscribed using the femtosecond laser back-side fabrication and selective etching, has a longitudinal length of 140 μm and a width of 12 μm. The aspect ratio of microstructures is ∼ 11.2. To showcase the potential of this technique, a rib waveguide with a longitudinal length and width of 60 μm was prepared and the rib waveguides supported a well confined mode at 1.55 μm. This process makes it possible to produce three-dimensional microstructures inside polycrystalline ZnSe, and thus offers a pathway for expanding the photonic crystal structure to the mid-to-far infrared field.