Wavefront Processing Research Articles

A wavefront processing coding metasurface with independent dynamic control of circularly and linearly polarized

To address the current issue of complex coding metasurface structure and deficiency of independent phase control for distinct polarized light within the broadband range, we present a wavefront processing coding metasurface with independent dynamic control of circularly and linearly polarized. The results demonstrate that when VO2 is in the metallic state and circularly polarized (CP) is incident, the metasurface can achieve efficient broadband circular polarization conversion in the 0.48–1.19 THz range, with a relative bandwidth of 85.02 %. It can achieve full 0-2π phase coverage by leveraging the P-B phase principle. When VO2 is in the dielectric state and linearly polarized (LP) is incident, x-LP can attain full 0-2π phase coverage in the range of 1.54–1.60 THz and y-LP can reach full 0-2π phase coverage in the range of 0.65–1.05 THz, which can be adjusted independently. Through encoding and arranging the metasurface, abnormal reflection and vortex beam generation of different polarized light in the same device are realized.

All-optical phase conjugation using diffractive wavefront processing

Optical phase conjugation (OPC) is a nonlinear technique used for counteracting wavefront distortions, with applications ranging from imaging to beam focusing. Here, we present a diffractive wavefront processor to approximate all-optical phase conjugation. Leveraging deep learning, a set of diffractive layers was optimized to all-optically process an arbitrary phase-aberrated input field, producing an output field with a phase distribution that is the conjugate of the input wave. We experimentally validated this wavefront processor by 3D-fabricating diffractive layers and performing OPC on phase distortions never seen during training. Employing terahertz radiation, our diffractive processor successfully performed OPC through a shallow volume that axially spans tens of wavelengths. We also created a diffractive phase-conjugate mirror by combining deep learning-optimized diffractive layers with a standard mirror. Given its compact, passive and multi-wavelength nature, this diffractive wavefront processor can be used for various applications, e.g., turbidity suppression and aberration correction across different spectral bands.

Reinforcement Learning Environment for Wavefront Sensorless Adaptive Optics in Single-Mode Fiber Coupled Optical Satellite Communications Downlinks

Optical satellite communications (OSC) downlinks can support much higher bandwidths than radio-frequency channels. However, atmospheric turbulence degrades the optical beam wavefront, leading to reduced data transfer rates. In this study, we propose using reinforcement learning (RL) as a lower-cost alternative to standard wavefront sensor-based solutions. We estimate that RL has the potential to reduce system latency, while lowering system costs by omitting the wavefront sensor and low-latency wavefront processing electronics. This is achieved by adopting a control policy learned through interactions with a cost-effective and ultra-fast readout of a low-dimensional photodetector array, rather than relying on a wavefront phase profiling camera. However, RL-based wavefront sensorless adaptive optics (AO) for OSC downlinks faces challenges relating to prediction latency, sample efficiency, and adaptability. To gain a deeper insight into these challenges, we have developed and shared the first OSC downlink RL environment and evaluated a diverse set of deep RL algorithms in the environment. Our results indicate that the Proximal Policy Optimization (PPO) algorithm outperforms the Soft Actor–Critic (SAC) and Deep Deterministic Policy Gradient (DDPG) algorithms. Moreover, PPO converges to within 86% of the maximum performance achievable by the predominant Shack–Hartmann wavefront sensor-based AO system. Our findings indicate the potential of RL in replacing wavefront sensor-based AO while reducing the cost of OSC downlinks.

A segmentation clock patterns cellular differentiation in a bacterial biofilm.

Contrary to multicellular organisms that display segmentation during development, communities of unicellular organisms are believed to be devoid of such sophisticated patterning. Unexpectedly, we find that the gene expression underlying the nitrogen stress response of a developing Bacillus subtilis biofilm becomes organized into a ring-like pattern. Mathematical modeling and genetic probing of the underlying circuit indicate that this patterning is generated by a clock and wavefront mechanism, similar to that driving vertebrate somitogenesis. We experimentally validated this hypothesis by showing that predicted nutrient conditions can even lead to multiple concentric rings, resembling segments. We additionally confirmed that this patterning mechanism is driven by cell-autonomous oscillations. Importantly, we show that the clock and wavefront process also spatially patterns sporulation within the biofilm. Together, these findings reveal a biofilm segmentation clock that organizes cellular differentiation in space and time, thereby challenging the paradigm that such patterning mechanisms are exclusive to plant and animal development.

A clock and wavefront mechanism organizes cell types in a bacterial biofilm

Multicellular organisms organize cell types in a segmented manner during development. In contrast, communities of unicellular organisms are not thought to be able to organize in such a sophisticated way. We find that a Bacillus subtilis bacterial biofilm organizes nitrogen stress response in a segmented pattern. Mathematical modeling and genetic probing of the underlying circuit show that this patterning is generated by a clock and wavefront mechanism, similar to that driving vertebrate somitogenesis. Single cell tracking show that individual bacteria oscillate in nitrogen stress response, creating segments as the biofilm expands. We show that the clock and wavefront process spatially organizes distinct cell types in different segments of the biofilm. Together, these findings reveal that a clock and wavefront mechanism organizes differentiated bacterial cell types in space and time, thereby challenging the paradigm that such patterning mechanisms are exclusive to plant and animal development.

A segmentation clock patterns cellular differentiation in a bacterial biofilm

Contrary to multicellular organisms that display segmentation during development, communities of unicellular organisms are believed to be devoid of such sophisticated patterning. Unexpectedly, we find that the gene expression underlying the nitrogen stress response of a developing Bacillus subtilis biofilm becomes organized into a ring-like pattern. Mathematical modeling and genetic probing of the underlying circuit indicate that this patterning is generated by a clock and wavefront mechanism, similar to that driving vertebrate somitogenesis. We experimentally validated this hypothesis by showing that predicted nutrient conditions can even lead to multiple concentric rings, resembling segments. We additionally confirmed that this patterning mechanism is driven by cell-autonomous oscillations. Importantly, we show that the clock and wavefront process also spatially patterns sporulation within the biofilm. Together, these findings reveal a biofilm segmentation clock that organizes cellular differentiation in space and time, thereby challenging the paradigm that such patterning mechanisms are exclusive to plant and animal development.

Design and dynamic performance of wavefront processor for 961 element adaptive optics system based on GPU

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Reflective Focusing Based on Few-Layer Gradient Metasurface Element Array

This study proposes a three-layer focusing gradient metasurface for wavefront processing. The structure works in the frequency range of 15 to 25 GHz, and has a central frequency of 19.6 GHz. The metasurface unit is organized in a square and has high-impedance elements that reflect the full range of phase shifts. When the microwave beam is incident on this metasurface, the high-impedance elements modulate the beam according to the gradient arrangement, to realize the focusing effect of the lens, and the efficiency reaches 82%. The simulation results are consistent with the theoretical results.

Design of parallel wave-front restoration algorithm based on FPGA

As the “brain” of the entire adaptive optical (AO) system, the processing ability of the wave-front processor determines the closed-loop control bandwidth and the correction effect of the adaptive optics. Wave-front restoration is the core of wave-front processing, and its operation delay is an important index for measuring the entire wave-front processing capability. In this paper, a high parallelism and extensible wave-front restoration algorithm is designed to upgrade and optimize the original algorithm in combination with the characteristics of the field-programmable gate arrays’ high parallelism. Open-loop leveling and closed-loop correction experiments are conducted on 961- and 137-units deformable mirror AO systems. The experimental results demonstrate the feasibility and effectiveness of the proposed algorithm for the wave-front processing of large-scale AO systems.

Scalable platform for adaptive optics real-time control, part 1: concept, architecture, and validation

We demonstrate a novel architecture for Adaptive Optics (AO) control based on FPGAs (Field Programmable Gate Arrays), making active use of their configurable parallel processing capability. SPARC's unique capabilities are demonstrated through an implementation on an off-the-shelf inexpensive Xilinx VC-709 development board. The architecture makes SPARC a generic and powerful Real-time Control (RTC) kernel for a broad spectrum of AO scenarios. SPARC is scalable across different numbers of subapertures and pixels per subaperture. The overall concept, objectives, architecture, validation and results from simulation as well as hardware tests are presented here. For Shack-Hartmann wavefront sensors, the total AO reconstruction time ranges from a median of 39.4us (11x11 subapertures) to 1.283 ms (50x50 subapertures) on the development board. For large wavefront sensors, the latency is dominated by access time (~1 ms) of the standard DDR memory available on the board. This paper is divided into two parts. Part 1 is targeted at astronomers interested in the capability of the current hardware. Part 2 explains the FPGA implementation of the wavefront processing unit, the reconstruction algorithm and the hardware interfaces of the platform. Part 2 mainly targets the embedded developers interested in the hardware implementation of SPARC.

349单元自适应光学波前处理器

349单元自适应光学波前处理器

机动式车载自适应光学波前处理器的设计

机动式车载自适应光学波前处理器的设计

基于FPGA的自适应光学波前处理算法

基于FPGA的自适应光学波前处理算法

Massive parallel processing of image reconstruction from bispectrum through turbulence.

This paper presents a massively parallel method for the phase reconstruction of an object from its bispectrum phase. Our aim is to recover an enhanced version of a turbulence-corrupted image by developing an efficient and fast parallel image-restoration algorithm. The proposed massively parallel bispectrum algorithm relies on multiple block parallelization. Further, in each block, we employ wavefront processing through strength reduction to parallelize an iterative algorithm. Results are presented and compared with the existing iterative bispectrum method. We report a speed-up factor of 85.94 with respect to sequential implementation of the same algorithm for an image size of 1024×1024.

A Survey of Paradigms for Building and Designing Parallel Computing Machines

In this paper we describe paradigms for building and designing parallel computing machines. Firstly we elaborate the uniqueness of MIMD model for the execution of diverse applications. Then we compare the General Purpose Architecture of Parallel Computers with Special Purpose Architecture of Parallel Computers in terms of cost, throughput and efficiency. Then we describe how Parallel Computer Architecture employs parallelism and concurrency through pipelining. Since Pipelining improves the performance of a machine by dividing an instruction into a number of stages, therefore we describe how the performance of a vector processor is enhanced by employing multi pipelining among its processing elements. Also we have elaborated the RISC architecture and Pipelining in RISC machines After comparing RISC computers with CISC computers we observe that although the high speed of RISC computers is very desirable but the significance of speed of a computer is dependent on implementation strategies. Only CPU clock speed is not the only parameter to move the system software from CISC to RISC computers but the other parameters should also be considered like instruction size or format, addressing modes, complexity of instructions and machine cycles required by instructions. Considering all parameters will give performance gain . We discuss Multiprocessor and Data Flow Machines in a concise manner. Then we discuss three SIMD (Single Instruction stream Multiple Data stream) machines which are DEC/MasPar MP-1, Systolic Processors and Wavefront array Processors. The DEC/MasPar MP-1 is a massively parallel SIMD array processor. A wide variety of number representations and arithmetic systems for computers can be implemented easily on the DEC/MasPar MP-1 system. The principal advantages of using such 64×64 SIMD array of 4-bit processors for the implementation of a computer arithmetic laboratory arise out of its flexibility. After comparison of Systolic Processors with Wave front Processors we found that both of the Systolic Processors and Wave front Processors are fast and implemented in VLSI. The major drawback of Systolic Processors is the problem of availability of inputs when clock ticks because of propagation delays in connection buses. The Wave front Processors combine the Systolic Processor architecture with Data Flow machine architecture. Although the Wave front processors use asynchronous data flow computing structure, the timing in the interconnection buses, at input and at output is not problematic..

适用于波前处理器的自适应光学系统非共光路像差补偿方法

适用于波前处理器的自适应光学系统非共光路像差补偿方法

Wavefront processor for liquid crystal adaptive optics system based on Graphics Processing Unit

To process real-time wavefront signal in our liquid crystal adaptive optics system (LCAOS), a real-time wavefront processor (RTWP) with graphics processing unit (GPU) accelerator is developed. A series of parallel acceleration algorithm is implemented to reconstruct wavefront, compute gray map and process lookup table (LUT). Especially, an algorithm by using symmetry of Zernike polynomial is designed to compute gray map and it provides a speedup of 3.16. Finally, the total computing time in our RTWP is 109μs and temporal bandwidth in our LCAOS is 45Hz; it is shown that our RTWP has the ability to real time process wavefront signal in our LCAOS.

961单元自适应光学系统波前处理器

In consideration of the requirements of a large ground-based high resolution imaging telescope for the Wave-front Processor(WFP) of an adaptive optical system in output scales,processing speeds and control bandwidths,an adaptive optical system with thousand elements was explored.The adaptive optical WFP was composed of a master control computer,a wave-front processing host board and expandable wave-front processing sub boards and its output scale could reach the maximum of 1 200 elements.Large-scale logic devices were adopted as main processing chips,and a multithreading parallel pipeline algorithm was used to shorten the wave-front processing delay and promote the controlling bandwidth of the system.Then,an open loop experiment based on 961-element deformable mirror and a closed corrected experiment based on 137-element deformable mirror were performed.The result shows that the wave-front processing delay is 20.96 μs when the maximum sampling rate is 2000 frame/s,which demonstrates that the hardware expending circuit and multithreading parallel pipeline algorithm are feasible and effective for the wave-front processing of the adaptive optical systems.

嵌入式波前处理与控制系统设计

嵌入式波前处理与控制系统设计

Accelerating the Sweep3D for a Graphic Processor Unit

Abstract —As a powerful and flexible processor, the Graphic Processing Unit (GPU) can offer a great faculty in solving many high-performance computing applications. Sweep3D, which simulates a single group time-independent discrete ordinates (Sn) neutron transport deterministically on 3D Cartesian geometry space, represents the key part of a real ASCI application. The wavefront process for parallel computation in Sweep3D limits the concurrent threads on the GPU. In this paper, we present multi-dimensional optimization methods for Sweep3D, which can be efficiently implemented on the fine-grained parallel architecture of the GPU. Our results show that the overall performance of Sweep3D on the CPU-GPU hybrid platform can be improved up to 4.38 times as compared to the CPU-based implementation. Keywords —Sweep3D, Neutron Transport, GPU, CUDA 1. I NTRODUCTION When the first GPU was introduced in 1999, the GPU mainly had been used to transform, light and to rasterize triangles in three dimension (3D) graphics applications [1]. The perform-ance of GPU doubles about every six to nine months, which means that it outperforms the Cen-tral Processing Unit (CPU) by a lot [2]. The modern GPUs are throughput-oriented parallel processors that can offer peak performance up to 2.72 Tflops single-precision floating-point and 544 Gflops double-precision floating-point [3]. At the same time, the GPU programming models, such as NVIDIA’s Compute Unified Device Architecture (CUDA) [4], AMD/ATI’s Streaming Computing [5] and OpenCL [6], have matures and they simplify the processing of developing non-graphics applications. The enhancement of computing performance, and the development of programming models and software makes GPU more and more suitable for general purpose computing. At present, GPU has been successfully applied to medical imaging, universe explo-ration, physics simulation, linear system solutions, and other computation intensive domains [7]. There is a growing need to accurately simulate physical systems whose evolutions depend on the transport of subatomic particles coupled with other complex physics [8]. In many simula-tions, particle transport calculations consume the majority of the computational resources. For example, the time devoted to particle transport problems in multi-physics simulations takes up