Wake-up Receiver Research Articles

A New Scheme for Low-Power, Low-Latency, and Interferer-Tolerant Wake-Up Receivers

A New Scheme for Low-Power, Low-Latency, and Interferer-Tolerant Wake-Up Receivers

Fully Passive RF Wake-Up Receiver Including a Small Loop Antenna with -30.7 dBm Sensitivity at 26 kbps Bitrate

Fully Passive RF Wake-Up Receiver Including a Small Loop Antenna with -30.7 dBm Sensitivity at 26 kbps Bitrate

Many Thanks to the SSCS 2022 Technical Webinar Program [Society News

One of the many IEEE Solid-State Circuits Society (SSCS) offerings is the monthly technical webinar program. Its mission is to host talks by authorities to help educate members about current trends and their technical foundations. Speakers have presented on a broad range of topics, from wake-up receivers to backscatter circuits and from postquantum cryptography to CMOS neural probes. The technical webinar program committee includes Filip Tavernier (webinar chair), Alvin Loke (webinar advisor), Shahriar Mirabbasi, Shanthi Pavan, Milin Zhang, Visvesh Sathe, Viola Schaffer, Po-Hsuan Wei, and Sergio Bampi. We thank last year’s speakers for their time and dedication!

A 0.3-V, −75.8-dBm Temperature-Robust Differential Wake-Up Receiver for WSNs

This article presents a 0.3-V, −75.8-dBm differential wake-up receiver (WuRX) with temperature robustness for wireless sensor network (WSN) applications. In this work, an adaptive gate-biased pseudo-differential envelope detector (ED) with temperature compensation is proposed to achieve high conversion gain, wide range of tunability, and temperature robustness at the cost of low power consumption. To address the problem that the high supply voltage of the baseband amplifier (BB-AMP) limits the further reduction of the overall system supply voltage, a bulk-driven differential BB-AMP is also proposed, the characteristics of its ultralow supply voltage make the system supply voltage as low as 0.3 V. And the dual path offset calibration loop is proposed to eliminate all mismatches and offsets in the differential signal path, further ensuring the system robustness. This WuRX is implemented in a 65-nm LP CMOS process, operates at 434 MHz, consumes 6.96 nW from 0.3-V supply voltage, and achieves a sensitivity of −75.8 dBm at 250 bps. When the temperature changes from −10 °C to 50 °C, the sensitivity varies from −77.5 to −73.6 dBm.

Design and Implementation of Low Noise Amplifier Operating at 868 MHz for Duty Cycled Wake-Up Receiver Front-End

The integration of wireless communication, e.g., in real- or quasi-real-time applications, is related to many challenges such as energy consumption, communication range, quality of service, and reliability. The improvement of wireless sensor networks (WSN) performance starts by enhancing the capabilities of each sensor node. To minimize latencies without increasing energy consumption, wake-up receiver (WuRx) nodes have been introduced in recent works since they can be always-on or power-gated with short latencies by a power consumption in the range of some microwatts. Compared to standard receiver technologies, they are usually characterized by drawbacks in terms of sensitivity. To overcome the limitation of the sensitivity of WuRxs, a design of a low noise amplifier (LNA) with several design specifications is required. The challenging task of the LNA design is to provide equitable trade-off performances such as gain, power consumption, the noise figure, stability, linearity, and impedance matching. The design of fast settling LNA for a duty-cycled WuRx front-end operating at a 868 MHz frequency band is investigated in this work. The paper details the trade-offs between design challenges and illustrates practical considerations for the simulation and implementation of a radio frequency (RF) circuit. The implemented LNA competes with many commercialized designs where it reaches single-stage 12 dB gain at a 1.8 V voltage supply and consumes only a 1.6 mA current. The obtained results could be made tunable by working with off-the-shelf components for different wake-up based application exigencies.

A Passive Wideband Noise-Canceling Mixer-First Architecture With Shared Antenna Interface for Interferer-Tolerant Wake-Up Receivers and Low-Noise Primary Receivers.

Wake-up receivers (WuRX) present an opportunity to reduce average power consumption of IoT transceivers, however achieving sensitivity and interferer tolerance while providing wideband matching and sharing an antenna interface present a significant challenge for existing architectures. This paper presents a primary/WuRX which utilizes a quadrature hybrid coupler based N-Path mixer first architecture to simultaneously achieve low noise, wideband matching and a shared antenna interface. The passive-mixer first approach and a two-code modulated multi-tone signaling scheme provide interferer tolerance in the WuRX. The paper analyzes gain/power trade-offs in the proposed architecture in the context of noise impact with multi-tone WuRX signaling. The proposed architecture is implemented in 65 nm CMOS and occupies 2.25 mm 2. The primary RX achieves 3.8 dB NF and 0.75 dBm out-of-band P1dB with 440μW power consumption. The WuRX achieves -86 dBm sensitivity for 10kb/s data rate and up to -40 dB signal-to-interferer ratio (SIR) with 171μW power consumption.

A 16-nW-57-dBm Sensitivity Wakeup Receiver Using MEMS-Based Matching Network

This letter presents a nanowatt-level detector-first wakeup receiver using microelectromechanical system (MEMS)-based matching network (MN). The aluminum nitride (AlN) piezoelectric MEMS resonator is utilized to implement the impedance MN for high passive gain to improve the receiver sensitivity. The high- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$Q$ </tex-math></inline-formula> MEMS-based MN also greatly improves the receiver’s out-of-band interference rejection. Gate-biased envelope detector (ED) with small input capacitance is used for RF-to-baseband direct conversion. The wakeup receiver is implemented in a 180-nm CMOS process. It obtains −57-dBm sensitivity with 1-kbps ON-OFF keying (OOK) data rate at 789 MHz while consuming only 16-nW power consumption.

A 0.4 V, 6.4 nW, −75 dBm Sensitivity Fully Differential Wake-Up Receiver for WSNs Applications

This paper presents a fully differential wake-up receiver (WuRX) with ultra-low power and high sensitivity. Implementing the fully differential framework achieves differential signal processing without an off-chip balun, which achieves noise suppression and sensitivity improvement. The low voltage baseband signal processing (LVBSP) is proposed to cut down the power consumption, which is achieved by the low-voltage fast-response differential amplifier (LFDA) and the time-domain signal processing circuit. Moreover, the periodic offset cancellation technique (POCT) in the baseband circuit is proposed to alleviate the offset and low-frequency noise impacts. This WuRX is implemented in the TSMC 65-nm CMOS process occupying an active area of 0.18 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . When operating at 434 MHz, the proposed WuRX has a −75-dBm sensitivity at 250 bps while consuming 6.4 nW from 0.4 V supply voltage.

A 5.5–7.5‐GHz band‐configurable wake‐up receiver fully integrated in 45‐nm RF‐SOI CMOS

This work investigates a 5.5–7.5-GHz band-configurable duty-cycled wake-up receiver (WuRX) fully implemented in a 45-nm radio-frequency (RF) silicon-on-insulator (SOI) complementary-metal-oxide-semiconductor (CMOS) technology. Based on an uncertain intermediate frequency (IF) super-heterodyne receiver (RX) topology, the WuRX analogue front-end (AFE) incorporates a 5.5–7.5-GHz band-tunable low-power low-noise amplifier, a low-power Gilbert mixer, a digitally controlled oscillator (DCO), a 100-MHz IF band-pass filter (BPF), an envelope detector, a comparator, a pulse generator and a current reference. By application of duty cycling with a low duty cycle below 1%, the power consumption of the AFE was significantly reduced. In addition, the on-chip digital bank-end consists of a frequency divider, a phase corrector, a 31-bit correlator and a serial peripheral interface. A proof-of-concept WuRX circuit occupying an area of 1200 μm by 900 μm has been fabricated in a GlobalFoundries 45-nm RF-SOI CMOS technology. Measurement results show that at a data rate of 64 bps, the entire WuRX consumes only 2.3 μW. Tested at 8 operation bands covering 5.5–7.7 GHz, the WuRX has a measured sensitivity between −67.5 dBm and −72.4 dBm at a wake-up error rate of 10−3. With the sensitivity unchanged, the data rate of the WuRX can be scaled up to 8.2 kbps. To the authors' best knowledge, this work offers the largest RF bandwidth from 5.5 to 7.5 GHz, the most operation channels (≥8) and the fastest settling time (<115 ns) among the WuRXs reported to date.

Ultra-Low-Power IoT Communications: A Novel Address Decoding Approach for Wake-Up Receivers

Providing energy-efficient Internet of Things (IoT) connectivity has attracted significant attention in fifth-generation (5G) wireless networks and beyond. A potential solution for realizing a long-lasting network of IoT devices is to equip each IoT device with a wake-up receiver (WuR) to have always-accessible devices instead of always-on devices. WuRs typically comprise a radio frequency demodulator, sequence decoder, and digital address decoder and are provided with a unique authentication address in the network. Although the literature on efficient demodulators is mature, it lacks research on fast, low-power, and reliable address decoders. As this module continuously monitors the received ambient energy for potential paging of the device, its contribution to WuR’s power consumption is crucial. Motivated by this need, a low-power, reliable address decoder is developed in this paper. We further investigate the integration of WuR in low-power uplink/downlink communications and, using system-level energy analysis; we characterize operation regions in which WuR can contribute significantly to energy saving. The device-level energy analysis confirms the superior performance of our decoder. The results show that the proposed decoder significantly outperforms the state-of-the-art with power consumption of 60 nW, at cost of compromising negligible increase in decoding delay.

An Integrated RF-Powered Wake-Up Wireless Transceiver With –26 dBm Sensitivity

This article presents a fully RF-powered wireless transceiver integrating an efficient RF energy harvester (RFEH), a Wake-up Receiver (WuRx), and a Wake-up Transmitter (WuTx) on a single CMOS chip. The WuRx is designed to operate with supply voltages as low as 300 mV allowing to be entirely powered up by the RF energy at power levels as low as −26 dBm. The capability of the WuRx to operate without using a power management unit (PMU) enhances the sensitivity and overall conversion efficiency of the RFEH system. By utilizing an ultralow-power ultralow-voltage envelope detector to obtain the required signal levels, using passive amplification instead of an active low-noise amplifier, and eliminating the voltage regulator removing its power overhead, the transceiver’s input sensitivity has been improved at least by a factor 2 (3 dB) compared to the other previously reported RF-powered transceivers. The proposed transmitter consists of a fast start-up oscillator and an efficient class E power amplifier, which can be externally tuned for different output powers. Fabricated in the TSMC’s 130-nm CMOS process, the measurement results show that the proposed WuRx consuming only 5.7 nW works with input powers as low as −26 dBm, and the proposed transmitter can work with input powers as low as −23 dBm. The WuTx outputs −11 dBm with 51% efficiency at 2.45 GHz using high-Q off-chip components.

Low-Power and Low-Delay WLAN Using Wake-Up Receivers

Energy-efficient communication technologies are a key enabler for many IoT applications. Many existing communication protocols are based on duty-cycling techniques, that have an inherent tradeoff between delay and energy consumption. In the field of sensor networks, wake-up receivers have been investigated to overcome these problems and to further reduce energy consumption. We now go one step further and investigate the use of wake-up receivers in combination with IEEE 802.11 WLAN. We extend the protocol used to communicate between the access point and the client to introduce a wake-up signal. This can be implemented in a way that is fully compatible with existing WLAN standards, thus, it can be deployed gradually with little effort and no need to change existing systems. As a proof of concept and to perform first lab experiments, we developed a hardware prototype using a selective wake-up receiver and off-the-shelf USB-WLAN dongles. All experimental results are verified using an analytical model and a detailed simulation study. We show that our wake-up WLAN can provide connectivity for low-power devices with low delays and low energy consumption at the same time.

Wake-Up Receiver-Based Routing for Clustered Multihop Wireless Sensor Networks.

The Wireless Sensor Network (WSN) is one of the most promising solutions for the supervision of multiple phenomena and for the digitisation of the Internet of Things (IoT). The Wake-up Receiver (WuRx) is one of the most trivial and effective solutions for energy-constrained networks. This technology allows energy-autonomous on-demand communication for continuous monitoring instead of the conventional radio. The routing process is one of the most energy and time-consuming processes in WSNs. It is, hence, crucial to conceive an energy-efficient routing process. In this paper, we propose a novel Wake-up Receiver-based routing protocol called Clustered WuRx based on Multicast wake-up (CWM), which ensures energy optimisation and time-efficiency at the same time for indoor scenarios. In our proposed approach, the network is divided into clusters. Each Fog Node maintains the routes from each node in its cluster to it. When a sink requires information from a given node, it’s corresponding Fog Node uses a multicast wake-up mechanism to wake up the intended node and all the intermediate nodes that will be used in the routing process simultaneously. Measurement results demonstrate that our proposed approach exhibits higher energy efficiency and has drastic performance improvements in the delivery delay compared with other routing protocols.

Analytical and Experimental Performance Analysis of Enhanced Wake-Up Receivers Based on Low-Power Base-Band Amplifiers

With the introduction of Internet of Things (IoT) technology in several sectors, wireless, reliable, and energy-saving communication in distributed sensor networks are more important than ever. Thereby, wake-up technologies are becoming increasingly important as they significantly contribute to reducing the energy consumption of wireless sensor nodes. In an indoor environment, the use of wireless sensors, in general, is more challenging due to signal fading and reflections and needs, therefore, to be critically investigated. This paper discusses the performance analysis of wake-up receiver (WuRx) architectures based on two low frequency (LF) amplifier approaches with regard to sensitivity, power consumption, and package error rate (PER). Factors that affect systems were compared and analyzed by analytical modeling, simulation results, and experimental studies with both architectures. The developed WuRx operates in the 868 MHz band using on-off-keying (OOK) signals while supporting address detection to wake up only the targeted network node. By using an indoor setup, the signal strength and PER of received signal strength indicator (RSSI) in different rooms and distances were determined to build a wireless sensor network. The results show a wake-up packets (WuPts) detection probability of about 90% for an interior distance of up to 34 m.

A 193-nW Wake-Up Receiver Achieving −84.5-dBm Sensitivity for Green Wireless Communications

This paper presents a cost-effective, ultra-low-power and highly sensitive wake-up receiver (WuRX) to reduce overall power consumption of Wireless Sensor Networks (WSN). The proposed tuned radio frequency (TRF) receiver (RX) analogue front-end (AFE) incorporates a 400-MHz, low-power, low-noise amplifier (LNA) with a high voltage gain of 50 dB as well as a Gilbert Cell based envelop detector achieving a conversion gain of 224V^&#x2212;1 to enhance the overall sensitivity of the WuRX. Meanwhile, a duty-cycling technique is used to reduce the power consumption of the WuRX AFE. In addition, a 31-bit correlator is implemented in the WuRX digital back-end (DBE) to further improve the sensitivity of the WuRX by 4 dB. A proof-of-concept WuRX circuit prototype has been fabricated in a low-cost 180-nm CMOS technology. Measurement results show the complete WuRX attains a sensitivity of &#x2212;84.5 dBm at a wake-up error rate (<i>WER</i>) of 10^&#x2212;3 whilst only consuming 193nW at the minimum data rate of 64 bps with a carrier frequency of 402 MHz. With the sensitivity unchanged, the data rate of the WuRX can be scaled up from 64 bps to 8.2 kbps. The used 4-time oversampling technique makes the WuRX robust against asynchronization and clock deviation between the TX and RX. The proposed WuRX is a promising solution for energy-efficient rendezvous between wireless sensor nodes, particularly in application scenarios where both low power consumption and high sensitivity are indispensable.

A 2.4 GHz-91.5 dBm Sensitivity Within-Packet Duty-Cycled Wake-Up Receiver

This article presents a highly integrated 2.4-GHz wake-up receiver (WuRX) achieving 91.5 dBm sensitivity with a state-of-the-art power and latency combination of 2 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{W}$ </tex-math></inline-formula> at 100 ms. The proposed within-packet duty-cycling method employs a carrier-sense mechanism to turn off the WuRX early under idle channel conditions, which reduces the dc-power compared with conventional asynchronous packet-level duty cycling by <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$9\times $ </tex-math></inline-formula> at 10 ms latency (21 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{W}$ </tex-math></inline-formula> ) and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2\times $ </tex-math></inline-formula> at 1 s latency (0.9 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{W}$ </tex-math></inline-formula> ) at the cost of 2 dB in sensitivity. The uncertain-IF topology with a phase-locked loop (PLL)-aided event-driven calibrated local-oscillator (LO) helps reduce the dc-power while maintaining a fast startup. The channel-embedded OOK scheme is used to create a deterministic IF to enable baseband (BB) channel selection and achieve continuous wave (CW) interference tolerance of −47 dB at 20 MHz offset. Fabricated in 65 nm CMOS, input matching and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$LC$ </tex-math></inline-formula> oscillator are all implemented on-chip, and operation is demonstrated with integrated low dropout regulators to capture the degradations in realistic system integration.

Zero-Power Ultrasonic Wakeup Receiver Based on MEMS Switches for Implantable Medical Devices

This article demonstrates, for the first time, a zero-power ultrasonic wakeup receiver for intra-body communication with Implantable Medical Devices (IMDs). The system is based on a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${10} \times {10}$ </tex-math></inline-formula> Piezoelectric Micromachined Ultrasonic Transducer (pMUT) array, a zero-power 500 nm gap MEMS plasmonic switch, a low-leakage CMOS load-switch, and an <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ad hoc</i> sensing circuit. An ultrasonic signal of 10 mVpp is received by the pMUT array at a distance of 5 cm and brings the MEMS switch from the OFF-state (1 pA) to the ON-state ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$20~{\mu } \text{A}$ </tex-math></inline-formula> ) when biased at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$9.09~{V}_{\text {DC}}$ </tex-math></inline-formula> . This small current then wakes up the load-switch (< 10 nW when off), which powers up the sensing circuit to decode the pMUT signal. The system is demonstrated in a tissue phantom, making it ideal for intrabody communication.

Area-Efficient Integrated Current-Reuse Feedback Amplifier for Wake-Up Receivers in Wireless Sensor Network Applications.

Wireless sensor network (WSN) applications are under extensive research and development due to the need to interconnect devices with each other. To reduce latency while keeping very low power consumption, the implementation of a wake-up receiver (WuR) is of particular interest. In WuR implementations, meeting high performance metrics is a design challenge, and the obtention of high-sensitivity, high data rate, low-power-consumption WuRs is not a straightforward procedure. The focus of our proposals is centered on power consumption and area reduction to provide high integrability and maintain a low cost-per-node, while we simultaneously improve circuit sensitivity. Firstly, we present a two-stage design based on a feedback technique and improve the area use, power consumption and sensitivity of the circuit by adding a current-reuse approach. The first solution is composed of a feedback amplifier, two op-amps plus a low-pass filter. The circuit achieves a sensitivity of –63.2 dBm with a power consumption of 6.77 µA and an area as low as 398 × 266 µm2. With the current-reuse feedback amplifier, the power consumption is halved in the second circuit (resulting in 3.63 µA), and the resulting circuit area is as low as 262 × 262 µm2. Thanks to the nature of the circuit, the sensitivity is improved to –75 dBm. This latter proposal is particularly suitable in applications where a fully integrated WuR is desired, providing a reasonable sensitivity with a low power consumption and a very low die footprint, therefore facilitating integration with other components of the WSN node. A thorough discussion of the most relevant state-of-the-art solutions is presented, too, and the two developed solutions are compared to the most relevant contributions available in the literature.

Enhanced Airborne Ultrasound WuRx Using Aluminum Nitride 4-Beam pNUTs Arrays

In this work, we present an implementation of a low-power wake-up receiver (WuRx) that is remotely interrogated by airborne ultrasound. The transduction from ultrasound to electrical signal is performed by arrays of aluminum nitride (AlN) 4-Beam piezoelectric nanoscale ultrasound transducers (pNUTs). Two set of arrays with a center frequency at 45 kHz and 49 kHz are used for two separate validations of the WuRx. The arrays interface with electronics implemented with affordable off-the-shelf (OtS) components for amplification and demodulation of the wake-up signal. The system has a power consumption of <inline-formula> <tex-math notation="LaTeX">$27 ~\mu \text{W}$ </tex-math></inline-formula>, a modulation frequency of 1 kHz, and a minimum detectable pressure between 1.5 Pa and 0.6 Pa depending on the selected device. The individual pNUTs occupy an area of approximately <inline-formula> <tex-math notation="LaTeX">$100 ~\mu \text{m}$ </tex-math></inline-formula> x <inline-formula> <tex-math notation="LaTeX">$100 ~\mu \text{m}$ </tex-math></inline-formula>. A similar electronics architecture as the one presented in this document can be miniaturized to an area comparable to the one of the pNUT if implemented with integrated circuit (IC) technology, pointing to the possibility of integrating ultrasound WuRx into miniaturized, dust-like sensing platforms. [2021-0192]

Low-Power RF Wake-Up Receivers: Analysis, Tradeoffs, and Design

Wake-up receivers (WuRXs) offer a potentially energy-efficient means to enable asynchronous wake-up of higher-power and higher-performance radios without needing frequent (often energy-expensive) synchronization. Since WuRXs are typically on for a large percentage of the time, keeping their power consumption very low is critical to minimizing total energy draw. However, this is difficult while maintaining good sensitivity, interference resiliency, and robustness, all with application-appropriate wake-up latencies and form factors. This article reviews the main challenges facing WuRXs, outlines the most popular WuRX architectures, and details essential design techniques and trade-offs towards enabling utility in emerging applications.