Wafer-scale Single-crystal Graphene Research Articles

Single-crystal two-dimensional material epitaxy on tailored non-single-crystal substrates

The use of single-crystal substrates as templates for the epitaxial growth of single-crystal overlayers has been a primary principle of materials epitaxy for more than 70 years. Here we report our finding that, though counterintuitive, single-crystal 2D materials can be epitaxially grown on twinned crystals. By establishing a geometric principle to describe 2D materials alignment on high-index surfaces, we show that 2D material islands grown on the two sides of a twin boundary can be well aligned. To validate this prediction, wafer-scale Cu foils with abundant twin boundaries were synthesized, and on the surfaces of these polycrystalline Cu foils, we have successfully grown wafer-scale single-crystal graphene and hexagonal boron nitride films. In addition, to greatly increasing the availability of large area high-quality 2D single crystals, our discovery also extends the fundamental understanding of materials epitaxy.

Epitaxial growth of wafer scale antioxidant single-crystal graphene on twinned Pt(111)

Wafer-scale single-crystal graphene with strong antioxidation is fundamentally important for their applications in electronics and optoelectronics. Although significant progress has been achieved in the chemical vapor deposition (CVD) growth of graphene, the production of wafer-scale graphene with high crystalline and excellent oxidation resistance still remains a challenge. Here, we report the epitaxial growth of 6-inch single-crystal graphene on twinned Pt (111) films with in-plane rotation of 60°(T-Pt) by ambient-pressure CVD. Our results show that the CVD-grown graphene on T-Pt exhibits fast growth rate and ultrahigh stability under the high-temperature air condition (>500 °C). The density functional theory (DFT) calculations reveal that the twinned Pt(111) surface does not change the preferential orientation of graphene nucleation, leading to highly aligned graphene domains on the T-Pt substrate. Moreover, the edge growth of graphene cannot be limited by the Pt twin boundaries (TBs), which is responsible for the fast growth of graphene single crystals. This work provides a reliable route to produce wafer-size single-crystal graphene monolayers with excellent oxidation resistance and clarifies the oriented growth mechanism of graphene domains on twinned Pt substrate.

The Mechanism of Graphene Vapor-Solid Growth on Insulating Substrates.

Wafer-scale single-crystal graphene film directly grown on insulating substrates via the chemical vapor deposition (CVD) method is desired for building high-performance graphene-based devices. In comparison with the well-studied mechanism of graphene growth on transition metal substrates, the lack of understanding on the mechanism of graphene growth on insulating surfaces greatly hinders the progress. Here, by using first-principles calculation, we systematically explored the absorption of various carbon species CHx (x = 0, 1, 2, 3, 4) on three typical insulating substrates [h-BN, sapphire, and quartz] and reveal that graphene growth on an insulating surface is dominated by the reaction of active carbon species with the hydrogen-passivated graphene edges and thus is less sensitive to the type of the substrate. The dominating gas phase precursor, CH3, plays two key roles in graphene CVD growth on an insulating substrate: (i) to feed the graphene growth and (ii) to remove excessive hydrogen atoms from the edge of graphene. The threshold reaction barriers for the growth of graphene armchair (AC) and zigzag (ZZ) edges were calculated as 3.00 and 1.94 eV, respectively; thus the ZZ edge grows faster than the AC one. Our theory successfully explained why the circumference of a graphene island grown on insulating substrates is generally dominated by AC edges, which is a long-standing puzzle of graphene growth. In addition, the very slow graphene growth rate on an insulating substrate is calculated and agrees well with existing experimental observations. The comprehensive insights on the graphene growth on insulating surfaces at the atomic scale provide guidance on the experimental design for high-quality graphene growth on insulating substrates.

Wafer-scale fabrication of single-crystal graphene on Ge(1 1 0) substrate by optimized CH4/H2 ratio

The synthesis of high-quality wafer-scale single-crystal graphene is indispensable for the commercial applications of graphene-based electronic and photonic devices. Previously large-scale single-crystal graphene was successfully acquired by various growth optimization whereas the methods vary from lab to lab due to the complicated process of chemical vapor deposition. Here we present an approach to fabricate monolayer single-crystal graphene on 4-inch Ge(110) wafer by tuning CH4/H2 ratio precisely. By directly monitoring the growth process of graphene via atomic force microscopy, it is found that under high CH4/H2 ratio condition new graphene domains ceaselessly nucleate and enlarge during the whole growth process, while under low CH4/H2 ratio condition, the density of graphene domains is saturated at early stage, which causes the formation of single-crystal graphene. Terahertz time domain spectroscopy shows that the average carrier mobility of single-crystal graphene wafer is as high as 26351 cm2/V·s, comparable to that of the exfoliated graphene. This work provides an efficient and reliable approach to fabricate wafer-scale single-crystal graphene for microelectronics and optoelectronics applications in the future.

Wafer-scale growth of single-crystal graphene on vicinal Ge(001) substrate

Wafer-scale single-crystal graphene with high carrier mobility is essential as a promising channel material for the next-generation two-dimensional nanoelectronics. However, direct synthesis of wafer-scale single-crystal graphene on complementary metal oxide semiconductor (CMOS) compatible substrates still remains a challenge. Herein, we demonstrate that single-crystal graphene film with high mobility can be synthesized on the 15° miscut Ge(001) surface by perfectly aligning all the graphene islands and this feat has never been achieved on the normal Ge(001) surface. Both experimental observations and theoretical calculations suggest unidirectional alignment of the graphene islands on the 15° miscut Ge(001) surface is caused by suppression of graphene nucleation along the miscut direction of the vicinal surface. Ex situ atomic force microscopy (AFM) verifies that no additional graphene island nucleates after the initial nucleation process and wafer-scale single-crystal graphene is formed by the seamless stitching of the preferentially oriented graphene islands. The obtained wafer-scale single-crystal graphene possesses an ultrahigh carrier mobility, opening an avenue toward scalable fabrication of two-dimensional nanoelectronic devices based on single-crystal graphene without grain boundaries.

Spatially Controlled Nucleation of Single-Crystal Graphene on Cu Assisted by Stacked Ni.

In spite of recent progress of graphene growth using chemical vapor deposition, it is still a challenge to precisely control the nucleation site of graphene for the development of wafer-scale single-crystal graphene. In addition, the postgrowth patterning used for device fabrication deteriorates the quality of graphene. Herein we demonstrate the site-selective nucleation of single-crystal graphene on Cu foil based on spatial control of the local CH4 concentration by a perforated Ni foil. The catalytically active Ni foil acts as a CH4 modulator, resulting in millimeter-scale single-crystal grains at desired positions. The perforated Ni foil also allows to synthesize patterned graphene without any postgrowth processing. Furthermore, the uniformity of monolayer graphene is significantly improved when a plain Ni foil is placed below the Cu. Our findings offer a facile and effective way to control the nucleation of high-quality graphene, meeting the requirements of industrial processing.

Epitaxial graphene on SiC formed by the surface structure control technique

The thermal decomposition of silicon carbide (SiC) is a promising method for producing wafer-scale single-crystal graphene. The optimal growth condition for high-mobility epitaxial graphene fabricated by infrared rapid thermal annealing is discussed in this paper. The surface structures, such as step–terrace and graphene coverage structures, on a non-off-axis SiC(0001) substrate were well controlled by varying the annealing time in a range below 10 min. The mobility of graphene grown at 1620 °C for 5 min in 100 Torr Ar ambient had a maximum value of 2089 cm2 V−1 s−1. We found that the causes of the mobility reduction were low graphene coverage, high sheet carrier density, and nonuniformity of the step structure.

How Graphene Islands Are Unidirectionally Aligned on the Ge(110) Surface

The unidirectional alignment of graphene islands is essential to the synthesis of wafer-scale single-crystal graphene on Ge(110) surface, but the underlying mechanism is not well-understood. Here we report that the necessary coalignment of the nucleating graphene islands on Ge(110) surface is caused by the presence of step-pattern; we show that on the preannealed Ge(110) textureless surface the graphene islands appear nonpreferentially orientated, while on the Ge(110) surfaces with natural step pattern, all graphene islands emerge coaligned. First-principles calculations and theoretical analysis reveal this different alignment behaviors originate from the strong chemical binding formed between the graphene island edges and the atomic steps on the Ge(110) surface, and the lattice matching at edge-step interface dictates the alignment of graphene islands with the armchair direction of graphene along the [-110] direction of the Ge(110) substrate.

Correction to Toward the Synthesis of Wafer-Scale Single-Crystal Graphene on Copper Foils

Correction to Toward the Synthesis of Wafer-Scale Single-Crystal Graphene on Copper Foils

Correction to Toward the Synthesis of Wafer-Scale Single-Crystal Graphene on Copper Foils

Correction to Toward the Synthesis of Wafer-Scale Single-Crystal Graphene on Copper Foils

Toward the Synthesis of Wafer-Scale Single-Crystal Graphene on Copper Foils

In this research, we constructed a controlled chamber pressure CVD (CP-CVD) system to manipulate graphene's domain sizes and shapes. Using this system, we synthesized large (~4.5 mm(2)) single-crystal hexagonal monolayer graphene domains on commercial polycrystalline Cu foils (99.8% purity), indicating its potential feasibility on a large scale at low cost. The as-synthesized graphene had a mobility of positive charge carriers of ~11,000 cm(2) V(-1) s(-1) on a SiO(2)/Si substrate at room temperature, suggesting its comparable quality to that of exfoliated graphene. The growth mechanism of Cu-based graphene was explored by studying the influence of varied growth parameters on graphene domain sizes. Cu pretreatments, electrochemical polishing, and high-pressure annealing are shown to be critical for suppressing graphene nucleation site density. A pressure of 108 Torr was the optimal chamber pressure for the synthesis of large single-crystal monolayer graphene. The synthesis of one graphene seed was achieved on centimeter-sized Cu foils by optimizing the flow rate ratio of H(2)/CH(4). This work should provide clear guidelines for the large-scale synthesis of wafer-scale single-crystal graphene, which is essential for the optimized graphene device fabrication.