Wafer Foundry Research Articles

Selection criteria for equipment vendors by wafer foundry in Taiwan

Currently, most semiconductor manufacturers adopt a passive approach in the selection process of equipment technology and often lack careful consideration. However, with the emergence of technology bottleneck in semiconductor IC processes one after the other, semiconductor manufacturers no longer wait for equipment vendors to propose solutions in an effort to achieve leading edge in technology. Instead, they have taken initiatives as well as an active approach to participate in the establishment of equipment specifications and its development. Thus, the relationship between equipment vendors and semiconductor manufacturers no longer borders on ordinary buy and sell relationship, where mutual relationship is terminated once transaction has been completed. In reality, they now maintain a long–term cooperative relationship. The purpose of this paper is to understand the key factors considered by the topten semiconductor manufacturers in Taiwan when selecting equipment vendors. A separate review of the key factors considered by each type of manufacturers relative to their selection of equipment vendors is also conducted. Objective is to allow newly established semiconductor manufacturers to clearly understand its position in the industry as well as understand evaluation methods adopted by semiconductor manufacturers under which category they belong. Established manufacturers may use these results to evaluate their current equipment vendors. With respect to newly established, domestic or foreign equipment vendors who wish to enter the Taiwan's market, these results may provide useful information on the demands of Taiwan's customers to ensure smooth further contact. After compiling results of the survey, evaluation factors can be divided into four dimensions: production management, business management, potential competence, and current status.

TOOL PLANNING IN MULTIPLE PRODUCT-MIX UNDER CYCLE TIME CONSTRAINTS FOR WAFER FOUNDRIES USING GENETIC ALGORITHM

ABSTRACT Tool planning is to determine the number of tools in each workstation for achieving some objectives. This paper formulates and solves a tooling problem in the context of multi-product mix, where the mean cycle time must be under a predefined target. Due to demand variation, a wafer foundry frequently faces the need to manufacture in various product-mix. Previous literature has addressed the issue of multiple product-mix, yet the cycle time constraint has not been considered. Cycle time is a key performance index for wafer foundries and should not be ignored in their tool planning. We propose a genetic algorithm based solution methodology embedded with a queuing analysis to solve the problem. Test examples reveals that the proposed solution greatly outperforms that obtained by a single product mix planning.

Agile strategy adaptation in semiconductor wafer foundries: An example from Taiwan

The purpose of this paper is to discuss and examine how two Taiwanese firms–TSMC and UMC–who compete in the highly dynamic global semiconductor industry, are able to use their unique strategies to create a new wafer foundry sector. The birth of foundry business gave rise to the vertical disintegration of the IC industry. As the foundry industry evolved along its life cycle of embryonic, growth to shake-out stage, the focus of the foundry business migrated from manufacturing-centric to technology-centric and now to customer-centric. Various strategies were adopted at each stage by the incumbents to cope with the changes in the industry environment to sustain business growth.

Model to determine the backup capacity of a wafer foundry

Foundry companies are very concerned about fully utilizing equipment and increasing productivity because of the rapid depreciation and large investments made in equipment. Factory output is limited by its bottleneck machine. If a discrepancy exists between the planned and actual product mix, a new machine will become the bottleneck and will have a strong impact on the capacity. All famous foundry companies, such as TSMC, UMC, and others, implement backup solutions to such problems. However, the level of protective capacity at the non-bottleneck workstations strongly affects production performance. Therefore, the backup quantity should be well managed. Accordingly, a backup capacity determination model is presented in two parts: the Backup Capacity Determination Model (BCDM) and the Performance Evaluation Model (PEM). The concept of protective capacity is applied to determine the backup capacity in the BCDM. The determination of protective capacity is based on the statistical fluctuation of factors that include machine downtime and unreasonable queuing time in front of the non-bottleneck workstations. The PEM applies queuing theory and Little's Law to evaluate the effects of the backup capacity exceeding the backup capacity on throughput, work in process and the cycle time of the backup factory. A backup capacity determination model provides important information, so that managers have access to a sufficient and reliable reference when confronted with a problem that involves backup capacity.

National security vs. economic interests: reassessing Taiwan's mainland policy under Chen Shui‐bian

Having finished its first term, the Chen Shui‐bian Administration has found itself in deep water in the troubled cross‐Strait relations. Not only has Chen himself been making contradictory remarks, the Cabinet has been indecisive over issues related to China. The most difficult and irritating case for the DPP government has been the handling of the call made by high‐tech industries to allow them to invest in the mainland. The controversy seems to highlight a dilemma for Taiwan: while it needs the mainland market to save it from the current economic doldrums and create yet another potential ‘miracle’ of becoming a global economic powerhouse, it is worried that further economic engagement with its former rival may pose new kinds of threats to its national security. The debate over whether to allow an eight‐inch wafer foundry, the crown jewel of Taiwan's economy, to invest in the mainland market is but one case, albeit a highly significant one, of the difficult relations between the two sides of the Taiwan Strait.

Preemptive priority policy for hot lots transport services in 300mm semiconductor foundry

Highly automated material handling is one of the most concerns to foundry practitioners because efficient manual operations and coordination have been the core competence in 300mm manufacturing. Especially, one of the critical problems is how to provide an almost no-wait transport for hot lots in an automatic material handling environment. However, there is no effective method for hot lots handling in 300mm Overhead Hoist Transport (OHT) intrabay operation. This paper proposes an effective OHT dispatching method, Preemptive Priority Policy (PPP), to provide the transport services for hot lots against the normal lots transport requirements under 300mm frequently blocking transportation situation. The objective is to minimize the transport delay of hot lots and to convey our idea for hot lots transport services. Simulation experiments based on realistic data from a 300mm wafer foundry are conducted. Numerical results demonstrate that the PPP method can effective expedite the movement of the hot lots with acceptable time delay on normal lots, which is very useful to streamline the shop floor operations, like scheduling and dispatching, for eliminating time delays of hot lots in an automated environment. This can help fab managers for more precisely lots management and automated material handling system (AMHS) control.

A cost-effective wafer-level reliability test system for integrated circuit makers

Wafer-level reliability (WLR) testing receives much attention and becomes a major tool for process reliability qualification and in-line monitoring because WLR can provide real-time results for timely improvements. This in-situ test capability is greatly attributed to an automatic parametric tester for sample handling and data collection/analysis. This paper presents a cost-effective WLR test system for a semiconductor maker (an IDM as well as a foundry). The proposed system consists of flexible and extensible algorithm generation, which helps realize low-cost WLR solutions. The key features of our proposed system include cost-effective instrumentation (i.e., an Agilent 4156C parameter analyzer, a semi-auto, and thermal CASCADE 12751 wafer prober, a pulse generator, and a switching matrix) and the software for interface control and data analysis. Compared with the corresponding automatic test equipment (ATE), our system is capable of measuring electrical characteristics with higher accuracy and a wider temperature range. This leads to significant cost saving, much enhanced tool utilization, and improved flexibility. Its great extensibility is especially important for a wafer foundry, which often suffers test capacity shortage when numerous verifications and qualifications are to be done.

GCS opts for opto

Due to increased market demand, Global Communication Semiconductor Inc (GCS), a pure-play III-V compound semiconductor wafer foundry, is to expand its foundry services for the optoelectronics industry. GCS now provides a foundry service for optoelectronics component manufacturers, for products such as VCSELs, QWIP detectors, modulators, GaAs and InGaAs PIN diodes and arrays on 4-inch wafers. This is a short news story only. Visit www.three-fives.com for the latest advanced semiconductor industry news.

A dispatching scheme involving move control and weighted due date for wafer foundries

Increasing automation of wafer foundries in Taiwan has heightened the demand to automate dispatching decisions in recent years. To attain a better global performance, dispatching decisions should be made based on critical shop floor information. In this study, we present a dispatching scheme which combines move control and weighted due date concepts, genetic algorithm (GA) and simulation. The move control and weighted due date concept is applied to identify important dispatching decision factors respecting performance indices of due-date satisfaction and throughput. The GA is employed to derive proper weights for those decision factors. A simulation procedure capable of simultaneously considering product mix, reentrant process, and the influence of random events on the shop floor is developed to evaluate the system performance based on the derived weights of decision factors. A case study involving a simplified and revised data set from a Taiwanese wafer foundry is presented. Results show that the dispatching scheme proposed in this paper is effective and outperforms six conventional dispatching rules (FIFO, SPT, SRPT, EDD, SLACK, and CR) on performance measures of due date satisfaction, throughput, WIP level, critical machine utilization, and mean cycle time under both CONWIP and uniform release policies.