Stored Program Research Articles

Emulating Ebbinghaus forgetting behavior in a neuromorphic device based on low dimensional h-BN

Artificial synaptic devices that can mimic the biological synaptic functions of learning and forgetting are essential for the realization of neuromorphic computation, which could replace the von Neumann architecture. In this Letter, we have described a high-performing ultraviolet photodetector (wavelength 375 nm) using thin films of single-layer hexagonal boron nitride (h-BN) for potential use in fabricating a neuromorphic device. Furthermore, the classical Ebbinghaus forgetting curve can be optimized using various parameters such as the optical pulse width, number of pulses, and frequency of pulses. Our results show that the characteristic time constant (τ) has much more variability, indicating better performance control than the Ebbinghaus exponent (β). Furthermore, the performance of the optical synapse is very stable for low energy consumption, as low as 2–3 pJ.

Performance of Cloud Computing Resources Allocations SGLA Model Compared to ARIMA

Solutions for cloud computing are growing in popularity as a means for businesses to streamline operations, save expenses and increase productivity. The benefit of cloud services is that they let customers access on-demand apps and services from a shared pool of programmable computer resources and store data offsite. Cloud computing resource allocation requires sophisticated tools and methodologies for optimal utilization. These problems include load balancing, efficient resource management and compliance with legal and regulatory requirements. The majority of businesses are switching to cloud services and advising their customers to use internet services. However, effective resource allocation is critical for improving performance and lowering costs in this area. Due to unpredictable network traffic in cloud computing, resource allocation is challenging, which causes customers to complain about application timeouts, delayed system times and higher bandwidth use during peak hours. This entails allocating resources to various users and programs, such as memory, processing power, storage, and network bandwidth. In this regard, this study compares the performance ensemble method, which is stepwise Gaussian Linear Autoregressive (SGLA), and the individual method which is autoregressive integrated moving average (ARIMA). The Matlab tool is used for simulation and evaluation of the results. The results show SGLA prediction accuracy increased to an average of 98.9%, and ARIMA prediction showed an accuracy of 75.5%. In this regard, the ensemble method performed better than individual methods using the same datasets. The study recommends the ensemble method for the prediction and allocation of resources in cloud computing.

Sustainable Mixed-Halide Perovskite Resistive Switching Memories Using Self-Assembled Monolayers as the Bottom Contact.

The complex ionic-electronic conduction in mixed halide perovskites enables their use beyond von Neumann architectures implemented in resistive switching memory devices. Although device fabrication based on perovskite compounds involves solution-processing at low temperatures, reducing further fabrication costs by eliminating expensive materials can improve their compatibility with upscalable deposition techniques. Notably, the substrate on which the perovskite active layer is developed has been reported to severely affect its quality and thus the overall device performance. Hereby, we demonstrate the sustainable manufacturing of memristive perovskite solar cells by replacing the expensive poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine] (PTAA) that serves as a hole transporting layer (HTL) with a self-assembled monolayer (SAM), namely [2-(3,6-dimethoxy-9H-carbazol-9-yl)ethyl]phosphonic acid (MeO-2PACz). Multiple sequential memristive current-voltage characteristics of single devices are reported, and average data of multiple reference and targeted devices are compared. Resistive switching memory devices based on SAM exhibit improved performance having reduced average SET voltage values and narrower statistical variation compared to reference devices with PTAA. It is shown that both PTAA and SAM based devices exhibit high ON/OFF ratio of about 103 operating at low switching electric fields. Replacing an expensive polymer-based HTL with this approach reduces fabrication costs compared to PTAA.

Art and Language After AI

By ingesting a vast corpus of source material, generative deep learning models are capable of encoding multi-modal data into a shared embedding space, producing synthetic outputs which cannot be decomposed into their constituent parts. These models call into question the relation of conceptualisation and production in creative practices spanning musical composition to visual art. Moreover, artificial intelligence as a research program poses deeper questions regarding the very nature of aesthetic categories and their constitution. In this essay I will consider the intelligibility of the art object through the lens of a particular family of machine learning models, known as ‘latent diffusion’, extending an aesthetic theory to complement the image of thought the models (re)present to us. This will lead to a discussion on the semantics of computational states, probing the inferential and referential capacities of said models. Throughout I will endorse a topological view of computation, which will inform the neural turn in computer science, characterised as a shift from the notion of a stored program to that of a cognitive model. Lastly, I will look at the instability of these models by analysing their limitations in terms of compositionality and grounding.

Energy, demand for computing power and the Green World

The review looks at the main trends in global energy production and consumption over the last half century, based on P.L. Kapitza’s 1975 analysis using a unified approach based on the Umov–Poynting vector. Such aspects of the problem as the impact of energy consumption on gross national product per capita, reasons for different approaches of countries to the transition to renewable energy sources, existing sources of energy, global distribution of its production and consumption, features and prospects of different energy technologies, as well as technologies to reduce energy consumption are touched upon. Thus, since 1975, the price of one kilowatt-hour of "solar" electricity has fallen by orders of magnitude and this technology has moved to the forefront, while fusion still remains the "energy of the future" and coal continues to hold its position in the market. Somewhat unexpectedly, electronics and telecommunications have become a major consumer of energy, urging a shift from von Neumann architecture to neuromorphic technology in computers and the development of femto and attowatt optoelectronics. And a totally unforeseen energy consumer has been cryptocurrency mining. On the other hand, the harvesting of dissipated energy in a variety of ways is seen as an environmentally friendly alternative to the use of batteries in low and ultra-low-power devices.

Photonics for Neuromorphic Computing: Fundamentals, Devices, and Opportunities.

In the dynamic landscape of Artificial Intelligence (AI), two notable phenomena are becoming predominant: the exponential growth of large AI model sizes and the explosion of massive amount of data. Meanwhile, scientific research such as quantum computing and protein synthesis increasingly demand higher computing capacities. As the Moore's Law approaches its terminus, there is an urgent need for alternative computing paradigms that satisfy this growing computing demand and break through the barrier of the von Neumann model. Neuromorphic computing, inspired by the mechanism and functionality of human brains, uses physical artificial neurons to do computations and is drawing widespread attention. This review studies the expansion of optoelectronic devices on photonic integration platforms that has led to significant growth in photonic computing, where photonic integrated circuits (PICs) have enabled ultrafast artificial neural networks (ANN) with sub-nanosecond latencies, low heat dissipation, and high parallelism. In particular, various technologies and devices employed in neuromorphic photonic AI accelerators, spanning from traditional optics to PCSEL lasers are examined. Lastly, it is recognized that existing neuromorphic technologies encounter obstacles in meeting the peta-level computing speed and energy efficiency threshold, and potential approaches in new devices, fabrication, materials, and integration to drive innovation are also explored. As the current challenges and barriers in cost, scalability, footprint, and computing capacity are resolved one-by-one, photonic neuromorphic systems are bound to co-exist with, if not replace, conventional electronic computers and transform the landscape of AI and scientific computing in the foreseeablefuture.

Harnessing Persistent Photocurrent in a 2D Semiconductor-Polymer Hybrid Structure: Electron Trapping and Fermi Level Modulation for Optoelectronic Memory.

Recently, 2D semiconductor-based optoelectronic memory has been explored to overcome the limitations of conventional von Neumann architectures by integrating optical sensing and data storage into one device. Persistent photocurrent (PPC), essential for optoelectronic memory, originates from charge carrier trapping according to the Shockley-Read-Hall (SRH) model in 2D semiconductors. The quasi-Fermi level position influences the activation of charge-trapping sites. However, the correlation between quasi-Fermi level modulations and PPC in 2D semiconductors has not been extensively studied. In this study, we demonstrate optoelectronic memory based on a 2D semiconductor-polymer hybrid structure and confirm that the underlying mechanism is charge trapping, as the SRH model explains. Under light illumination, electrons transfer from polyvinylpyrrolidone to p-type tungsten diselenide, resulting in high-level injection and majority carrier-type transitions. The quasi-Fermi level shifts upward with increasing temperature, improving PPC and enabling optoelectronic memory at 433 K. Our findings offer valuable insights into optimizing 2D semiconductor-based optoelectronic memory.

Spike-Based Neuromorphic Hardware for Dynamic Tactile Perception with a Self-Powered Mechanoreceptor Array.

A self-powered mechanoreceptor array is demonstrated using four mechanoreceptor cells for recognition of dynamic touch gestures. Each cell consists of a triboelectric nanogenerator (TENG) for touch sensing and a bi-stable resistor (biristor) for spike encoding. It produces informative spike signals by sensing a force of an external touch and encoding the force into the number of spikes. An array of the mechanoreceptor cells is utilized to monitor various touch gestures and it successfully generated spike signals corresponding to all the gestures. To validate the practicality of the mechanoreceptor array, a spiking neural network (SNN), highly attractive for power consumption compared to the conventional von Neumann architecture, is used for the identification of touch gestures. The measured spiking signals are reflected as inputs for the SNN simulations. Consequently, touch gestures are classified with a high accuracy rate of 92.5%. The proposed mechanoreceptor array emerges as a promising candidate for a building block of tactile in-sensor computing in the era of the Internet of Things (IoT), due to the low cost and high manufacturability of the TENG. This eliminates the need for a power supply, coupled with the intrinsic high throughput of the Si-based biristor employing complementary metal-oxide-semiconductor (CMOS) technology.

In-Sensor Tactile Fusion and Logic for Accurate Intention Recognition.

Touch control intention recognition is an important direction for the future development of human-machine interactions (HMIs). However, the implementation of parallel-sensing functional modules generally requires a combination of different logical blocks and control circuits, which results in regional redundancy, redundant data, and low efficiency. Here, a location-and-pressure intelligent tactile sensor (LPI tactile sensor) unprecedentedly combined with sensing, computing, and logic is proposed, enabling efficient and ultrahigh-resolution action-intention interaction. The LPI tactile sensor eliminates the need for data transfer among the functional units through the core integration design of the layered structure. It actuates in-sensor perception through feature transmission, fusion, and differentiation, thereby revolutionizing the traditional von Neumann architecture. While greatly simplifying the data dimensionality, the LPI tactile sensor achieves outstanding resolution sensing in both location (<400µm) and pressure (75Pa). Synchronous feature fusion and decoding support the high-fidelity recognition of action and combinatorial logic intentions. Benefiting from location and pressure synergy, the LPI tactile sensor demonstrates robust privacy as an encrypted password device and interaction intelligence through pressure enhancement. It can recognize continuous touch actions in real time, map real intentions to target events, and promote accurate and efficient intention-driven HMIs.

Thermally Oxidized Memristor and 1T1R Integration for Selector Function and Low-Power Memory.

Resistive switching memories have garnered significant attention due to their high-density integration and rapid in-memory computing beyond von Neumann's architecture. However, significant challenges are posed in practical applications with respect to their manufacturing process complexity, a leakage current of high resistance state (HRS), and the sneak-path current problem that limits their scalability. Here, a mild-temperature thermal oxidation technique for the fabrication of low-power and ultra-steep memristor based on Ag/TiOx/SnOx/SnSe2/Au architecture is developed. Benefiting from a self-assembled oxidation layer and the formation/rupture of oxygen vacancy conductive filaments, the device exhibits an exceptional threshold switching behavior with high switch ratio exceeding 106, low threshold voltage of ≈1V, long-term retention of >104s, an ultra-small subthreshold swing of 2.5mVdecade-1 and high air-stability surpassing 4 months. By decreasing temperature, the device undergoes a transition from unipolar volatile to bipolar nonvolatile characteristics, elucidating the role of oxygen vacancies migration on the resistive switching process. Further, the 1T1R structure is established between a memristor and a 2H-MoTe2 transistor by the van der Waals (vdW) stacking approach, achieving the functionality of selector and multi-value memory with lower power consumption. This work provides a mild-thermal oxidation technology for the low-cost production of high-performance memristors toward future in-memory computing applications.

Multilevel Conductance States of Vapor-Transport-Deposited Sb2S3 Memristors Achieved via Electrical and Optical Modulation.

The pursuit of advanced brain-inspired electronic devices and memory technologies has led to explore novel materials by processing multimodal and multilevel tailored conductive properties as the next generation of semiconductor platforms, due to von Neumann architecture limits. Among such materials, antimony sulfide (Sb2S3) thin films exhibit outstanding optical and electronic properties, and therefore, they are ideal for applications such as thin-film solar cells and nonvolatile memory systems. This study investigates the conduction modulation and memory functionalities of Sb2S3 thin films deposited via the vapor transport deposition technique. Experimental results indicate that the Ag/Sb2S3/Pt device possesses properties suitable for memory applications, including low operational voltages, robust endurance, and reliable switching behavior. Further, the reproducibility and stability of these properties across different device batches validate the reliability of these devices for practical implementation. Moreover, Sb2S3-based memristors exhibit artificial neuroplasticity with prolonged stability, promising considerable advancements in neuromorphic computing. Leveraging the photosensitivity of Sb2S3 enables the Ag/Sb2S3/Pt device to exhibit significant low operating potential and conductivity modulation under optical stimulation for memory applications. This research highlights the potential applications of Sb2S3 in future memory devices and optoelectronics and in shaping electronics with versatility.

Hardware Implementation of Next Generation Reservoir Computing with RRAM‐Based Hybrid Digital‐Analog System

Reservoir computing (RC) possesses a simple architecture and high energy efficiency for time‐series data analysis through machine learning algorithms. To date, RC has evolved into several innovative variants. The next generation reservoir computing (NGRC) variant, founded on nonlinear vector autoregression (NVAR) distinguishes itself due to its fewer hyperparameters and independence from physical random connection matrices, while yielding comparable results. However, NGRC networks struggle with massive Kronecker product calculations and matrix‐vector multiplications within the read out layer, leading to substantial efficiency challenges for traditional von Neumann architectures. In this work, a hybrid digital‐analog hardware system tailored for NGRC is developed. The digital part is a Kronecker product calculation unit with data filtering, which realizes transformation of nonlinear vector of the input linear vector. For matrix‐vector multiplication, a computing‐in‐memory architecture based on resistive random access memory array offers an energy‐efficient hardware solution, which markedly reduces data transfer and greatly improve computational parallelism and energy efficiency. The predictive capabilities of this hybrid NGRC system are validated through the Lorenz63 model, achieving a normalized root mean square error (NRMSE) of 0.00098 and an energy efficiency of 19.42TOPS W−1.

Principles, fabrication, and applications of halide perovskites‐based memristors

AbstractIn recent decades, the microelectronics industry has developed rapidly based on the von Neumann architecture and under the guidance of Moore's law. However, as the size of electronic devices approaches the limit and power consumption increases, traditional microelectronic materials and devices are facing more and more challenges. As a new type of semiconductor material, halide perovskites (HPs) have excellent photoelectric characteristics, such as high carrier mobility, controllable band structure, etc., which have been widely used in solar cells, light emitting diodes (LEDs), photodetectors, memristors, and in other fields. Among them, the memristor, as a new type of electronic device, is very promising for in‐memory computing with low power consumption by breaking the limit of von Neumann architecture. Especially, HPs‐based memristors show outstanding photoelectric response performance, low power consumption, and flexible wearability, allowing them to hold great application potential in logical operation, polymorphic storage, and neuromorphic computing, etc. In this review, we first briefly introduce the basic characteristics and preparation methods of HPs. Secondly, the development history, device structure, and performance parameters of memristors are depicted in detail. Thirdly, the resistance mechanism and application of HPs‐based memristors are discussed. Finally, the research status and development prospects of HPs‐based memristors are outlined.

Virtual Machinations: Using Large Language Models as Neural Computers

We explore how Large Language Models (LLMs) can function not just as databases, but as dynamic, end-user programmable neural computers. The native programming language for this neural computer is a Logic Programming-inspired declarative language that formalizes and externalizes the chain-of-thought reasoning as it might happen inside a large language model.

Analog Implementation of a Spiking Neuron with Memristive Synapses for Deep Learning Processing

Analog neuromorphic prototyping is essential for designing and testing spiking neuron models that use memristive devices as synapses. These prototypes can have various circuit configurations, implying different response behaviors that custom silicon designs lack. The prototype’s behavior results can be optimized for a specific foundry node, which can be used to produce a customized on-chip parallel deep neural network. Spiking neurons mimic how the biological neurons in the brain communicate through electrical potentials. Doing so enables more powerful and efficient functionality than traditional artificial neural networks that run on von Neumann computers or graphic processing unit-based platforms. Therefore, on-chip parallel deep neural network technology can accelerate deep learning processing, aiming to exploit the brain’s unique features of asynchronous and event-driven processing by leveraging the neuromorphic hardware’s inherent parallelism and analog computation capabilities. This paper presents the design and implementation of a leaky integrate-and-fire (LIF) neuron prototype implemented with commercially available components on a PCB board. The simulations conducted in LTSpice agree well with the electrical test measurements. The results demonstrate that this design can be used to interconnect many boards to build layers of physical spiking neurons, with spike-timing-dependent plasticity as the primary learning algorithm, contributing to the realization of experiments in the early stage of adopting analog neuromorphic computing.

Artificial consciousness: a perspective from the free energy principle

Does the assumption of a weak form of computational functionalism, according to which the right form of neural computation is sufficient for consciousness, entail that a digital computational simulation of such neural computations is conscious? Or must this computational simulation be implemented in the right way, in order to replicate consciousness?From the perspective of Karl Friston’s free energy principle, self-organising systems (such as living organisms) share a set of properties that could be realised in artificial systems, but are not instantiated by computers with a classical (von Neumann) architecture. I argue that at least one of these properties, viz. a certain kind of causal flow, can be used to draw a distinction between systems that merely simulate, and those that actually replicate consciousness.

Synaptic plasticity and associative learning in IGZO-based synaptic transistor

The increasing demand for efficient data access in high-performance computing systems has emphasized the limitations of the traditional von Neumann architecture, particularly due to the von Neumann bottleneck. This bottleneck arises from the significant power and time consumption required for data transfer between the central processing units and memory, impeding overall system efficiency. Neuromorphic computing offers a promising alternative. Neuromorphic systems emulate biological neurons and synapses, enabling parallel data processing and potentially overcoming the limitations of traditional computing architectures. This study focuses on synaptic transistors with In–Ga–Zn-O (IGZO) channels and TaOx charge trapping layers (Ox-CTL) to enhance neuromorphic computing capabilities. The devices were fabricated using reactive sputtering and atomic layer deposition, followed by comprehensive structural and compositional analyses. Experimental results demonstrated significant hysteresis, high on/off ratios, and multibit conductance states, suggestive of effective charge trapping and detrapping mechanisms. Evaluation through potentiation, depression, and excitatory postsynaptic current (EPSC) measurements, along with simulations using the Modified National Institute of Standards and Technology (MNIST) database, revealed improved pattern recognition accuracy. Additionally, associative learning experiments modeled after Pavlov’s dog conditioning emphasized the device's capability for both long- and short-term memory retention. These findings suggest that IGZO-based synaptic transistors are promising candidates for next-generation neuromorphic computing systems, offering enhanced data processing efficiency and adaptability.

Topological order from measurements and feed-forward on a trapped ion quantum computer

Quantum systems evolve in time in one of two ways: through the Schrödinger equation or wavefunction collapse. So far, deterministic control of quantum many-body systems in the lab has focused on the former, due to the probabilistic nature of measurements. This imposes serious limitations: preparing long-range entangled states, for example, requires extensive circuit depth if restricted to unitary dynamics. In this work, we use mid-circuit measurement and feed-forward to implement deterministic non-unitary dynamics on Quantinuum’s H1 programmable ion-trap quantum computer. Enabled by these capabilities, we demonstrate a constant-depth procedure for creating a toric code ground state in real-time. In addition to reaching high stabilizer fidelities, we create a non-Abelian defect whose presence is confirmed by transmuting anyons via braiding. This work clears the way towards creating complex topological orders in the lab and exploring deterministic non-unitary dynamics via measurement and feed-forward.

Readout Circuit Design for RRAM Array-Based Computing in Memory Architecture

In recent advancements, the traditional von Neumann architecture has been challenged by the computational needs of AI. This is due to its high power and data transfer costs. As a solution, the computing-in-memory (CIM) architecture, which combines storage and computation, has gained attention for its superior computational power and energy efficiency. Within CIM, using resistive random access memory (RRAM) arrays, the readout circuit, which converts analog outputs from multiply–accumulate operations into digital signals, faces limitations due to its area and power consumption. There are mainly two types of CIM readout circuits for analog types: the traditional ADC type and the non-traditional type. This paper presents two types of readout circuit designs. The first is a low-power, compact successive approximation register (SAR) analog-to-digital converter (ADC) readout circuit. The core circuit is an 8-bit SAR ADC operating at 70 MS/s. It incorporates a linearity-improved bootstrapped switch to minimize leakage and enhance linearity, whose spurious-free dynamic range (SFDR) has been improved by 10.1 dB from 76.78 dB to 86.88 dB, and whose signal-to-noise and distortion ratio (SNDR) has increased by 4.56 dB from 75.13 dB to 79.69 dB. The delay of a transconductance-enhanced dynamic comparator is reduced from 184 ps to 149 ps, presenting a performance improvement of approximately 20%. Concurrently, the energy consumption decreased from 178 μm to 132 μm, attaining an improvement of roughly 26%. A “sandwich” capacitor structure is used that reduces the overall area of the layout. After layout and post-simulation, this circuit occupies only 49.6 μm × 51.5 μm, consumes 553 μW power, has a SINAD of 46.22 dB, and has an SFDR of 57.21 dB. The second is a current controlled oscillator (CCO)-type readout circuit, which comprises a CCO oscillator with low process-sensitivity. The readout circuit also utilizes an op-amp and current mirrors for a negative feedback loop, ensuring a constant voltage across the RRAM arrays. The frequency generated through the CCO is controlled by the current, and quantified by a counter, supporting different weights quantification per ReRAM column without additional digital weighting. This circuit achieves 95-level resolution, 5.2 μs delay, and an average consumption of 183.1 μW. A comparative analysis highlights that traditional ADC readout circuits offer high resolution and speed but are limited by their high power and area costs, often overshadowing CIM arrays’ benefits. Thus, for applications with more lenient resolution and speed requirements, non-traditional readout circuits present considerable advantages.

Nondefective Vacancy Enhanced Resistive Switching Reliability in Emergent van der Waals Metal Phosphorus Trisulfide-Based Memristive In-Memory Computing Hardware.

Two-dimensional-material-based memristors are emerging as promising enablers of new computing systems beyond von Neumann computers. However, the most studied anion-vacancy-enabled transition metal dichalcogenide memristors show many undesirable performances, e.g., high leakage currents, limited memory windows, high programming currents, and limited endurance. Here, we demonstrate that the emergent van der Waals metal phosphorus trisulfides with unconventional nondefective vacancy provide a promising paradigm for high-performance memristors. The different vacancy types (i.e., defective and nondefective vacancies) induced memristive discrepancies are uncovered. The nondefective vacancies can provide an ultralow diffusion barrier and good memristive structure stability giving rise to many desirable memristive performances, including high off-state resistance of 1012 Ω, pA-level programming currents, large memory window up to 109, more than 7-bit conductance states, and good endurance. Furthermore, a high-yield (94%) memristor crossbar array is fabricated and implements multiple image processing successfully, manifesting the potential for in-memory computing hardware.