Voltage Differencing Transconductance Amplifier Research Articles

A Low-Power Tunable Differentiator Using Voltage Difference Transconductance Amplifier (VDTA) for Tunable PD Controller

The electronically tunable differentiator using a voltage difference transconductance amplifier (VDTA) is proposed, designed, and analyzed. The simulation was done using the Cadence Virtuoso tool of 45[Formula: see text]nm CMOS technology with a supply voltage of ±0.9[Formula: see text]V. The maximum power consumption of the proposed circuit is 246[Formula: see text][Formula: see text]W with a total harmonic distortion of 5.4%. The output can be tuned using four parameters: [Formula: see text], [Formula: see text], [Formula: see text], and [Formula: see text]. The transconductance can be varied using bias current and aspect ratio of CMOS transistors. The utilized area of VDTA layout is [Formula: see text]. The parasitic impedance affects the output of post-layout simulation and causes little delay compared to schematic. The design has been experimentally verified using LM13700 integrated circuit. The results of the proposed circuit show good agreement with the experimental results and mathematical expressions. The proposed circuit can be used as a tunable PD controller, in which the voltage gain of the proposed circuit is [Formula: see text]. The design is versatile and can be used in different applications such as temperature control systems, photo voltaic cells, waveform generators, microwave communications systems, and instrumentation systems.

New Approaches for Realizing Transconductance-boosted VDTA Structures

This paper presents two new transconductance-boosted architectures of the voltage differencing transconductance amplifier (VDTA). The first architecture (VDTA-I) relies on the technique of transconductance enhancement using partial positive feedback which is realized through negative impedance implemented using a cross-coupled amplifier. The second architecture (VDTA-II) incorporates the concept of gate-to-source voltage enhancement using an inverting amplifier for transconductance boosting. Detailed mathematical formulations for computing transconductance gain and bandwidth are presented using high-frequency small-signal equivalent circuits of both propositions. The functionality of the proposals is validated through SPICE simulations using TSMC 0.18[Formula: see text][Formula: see text]m technology parameters. Both DC and AC analyses are carried out through simulations. An enhancement in transconductance gain of 140% is observed for VDTA-I whereas for VDTA-II it is found to be 53% in comparison to the conventional VDTA. The 3[Formula: see text]dB frequencies are recorded to be 160 and 630[Formula: see text]MHz, respectively. The PVT analyses are also carried out to test the efficacy of both propositions.

DTMOS based four-quadrant multiplier/divider with voltage difference transconductance amplifier

DTMOS based four-quadrant multiplier/divider with voltage difference transconductance amplifier

Current and transconductance mode full/half‐wave rectifiers realized with only one active block

SummaryThis research paper introduces a novel active building block for full/half‐wave (inverse) rectifier circuits, eliminating the need for passive elements. The paper presents two alternative implementations: a current mode approach utilizing MO‐CFTA (multiple output current follower transconductance amplifier) and a transconductance mode approach utilizing MO‐VDTA (multiple output voltage differencing transconductance amplifier). Both circuit configurations exhibit favorable zero‐crossing characteristics and exceptional linearity. The transconductance mode rectifier enables electronic control of the output current signal by adjusting the applied bias currents. The circuits are designed with simplicity and compactness in mind, making them highly suitable for integration into IC circuits. The analysis investigates the impact of non‐idealities and parasitic effects, although the absence of passive elements results in minimal parasitic effects. Simulation results conducted using 0.18‐μm CMOS technology and a ±0.9‐V supply voltage align closely with the theoretical predictions. Furthermore, Monte Carlo simulations and corner analysis are employed to evaluate the circuit's robustness. To validate the feasibility of the proposed solution, experimental tests are performed using commercially available components. The designs are implemented on Cadence Virtuoso, and post‐layout measurements are conducted to further verify the proposed solutions.

Dual-Mode Single-Input Three-Output Multifunction Filter and Quadrature Oscillator Consisting of Two Voltage Differencing Transconductance Amplifiers and Two Grounded Capacitors

Dual-Mode Single-Input Three-Output Multifunction Filter and Quadrature Oscillator Consisting of Two Voltage Differencing Transconductance Amplifiers and Two Grounded Capacitors

Design and analysis of Voltage Difference Transconductance Amplifier (VDTA) at FINFET CMOS technology

This paper proposes a FINFET (Fin Field Effect Transistor)-based Voltage Difference Transconductance Amplifier (VDTA). This paper aims to provide an amplifier that will enable VDTA to achieve its desired characteristics. The circuit proposed for FINFET-based VDTA operates with a bias current order of 150μA and a source voltage of 0.9V. The active element makes the amplitude electronically tuneable with bias current. The designed circuit was implemented in both GPDK 180nm technology and FINFET technology using the Cadence Virtuoso tool. Various factors, including technology node components and the operating voltage provided by FINFET VDTA structures, are compared. A Monte Carlo simulation is conducted for the suggested circuit, which dissipates 187.53μW of power. In comparison to the standard VDTA, it exhibits notably low power dissipation.

A New Electronic Tunable High-Frequency Meminductor Emulator Based on a Single VDTA

In this article, we have proposed an electronic tunable grounded meminductor emulator (MIE) using a single voltage difference transconductance amplifier (VDTA). Along with one VDTA, two MOSFETs and two capacitors are used in the proposed MIE. Overall, the proposed MIE requires only 18 MOS transistors and two grounded capacitors. The performance of the proposed MIE was validated using Cadence Virtuoso with a 180-nm CMOS library. The layout area of the emulator is only 1081 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu$</tex-math> </inline-formula> m <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{2}$</tex-math> </inline-formula> . The proposed design operates up to 25 MHz. To validate the theoretical and simulation results, an experiment was performed using CA3080 ICs and experimental results validate the simulated result. The power consumption of the proposed design is 5.93 mW.

VDTA-based floating/grounded series/parallel R-L and R-C immittance simulators with a single grounded capacitor

Active configurations for simulating floating/grounded series and parallel immittance functions based on voltage differencing transconductance amplifiers (VDTAs) are proposed. The grounded series and parallel immittance simulators presented here require only one VDTA, while the proposed floating ones only need two. Each of the suggested simulators uses a single grounded capacitor. The proposed topologies can imitate R-L and R-C immittances in both series and parallel types. All of the simulated equivalent elements are electronically adjustable through the VDTA’s transconductance. Furthermore, no component-matching restrictions are imposed in order to achieve the appropriate immittance function. Applications of the proposed VDTA-based immittance simulators include bandpass filter and quadrature oscillator implementations. The behaviors of the proposed circuits and their applications are evaluated by PSPICE simulations and experimental observations using VDTA implemented with commercially available CA3080 type OTAs.

Two New Voltage-Mode Sinusoidal Quadrature Oscillators Employing Second-Generation Voltage Conveyors

This article presents an application of a second-generation voltage conveyor (VCII) as a quadrature oscillator. The controlling parameters of the presented circuits, i.e. oscillation condition and oscillation frequency are tuneable without affecting the other. Both the single-resistance-controlled oscillators employ only two VCII, two grounded capacitors, and three grounded/ virtually grounded resistors. To strengthen the design idea regular mathematical analysis such as ideal, non-ideal, parasitic, frequency stability, phase noise analysis, and sensitivity calculations have been performed. To validate the proposed networks, the simulations have been carried out using 180 nm CMOS technology parameters, and experimental studies have also been performed using commercially available integrated circuits. Abbreviations: VDTA: voltage differencing transconductance amplifier; CDBA: current differencing buffered amplifier; OTRA: operational transconductance amplifier; CCI: first generation current conveyor; CCII: second generation current conveyor; ICCII: Inverting current conveyor; CFOA: current feedback operational amplifier; CDTA: current differencing transconductance amplifier; VDDDA: voltage differencing differential difference amplifier; OTA: operational transconductance amplifier; DVCC: differential voltage current conveyor; DXCCTA: dual:X current conveyor transconductance amplifier; M: MOS model; H: Hardware experimentation; BJT:Bipolar Junction Transistor; MM: Macro-model Simulation.

Mutually coupled circuit employing canonical number of active and passive elements

This paper presents a new mutually coupled circuit (MCC) employing voltage differencing transconductance amplifiers (VDTAs). The proposed circuit consists of two VDTAs, a single resistor, and two grounded capacitors. The inductances can be adjusted independently and electronically. Only one matching condition is required to achieve symmetrical coupling. The time-domain and frequency-domain simulation results confirm the theoretical analysis. An application example is given to demonstrate the functionality of the circuit. An experimental study is given to confirm the theoretical analysis by utilizing commercially available integrated circuits (ICs).

VDTA and DO-CCII based incremental/decremental floating memductance/meminductance simulator: A novel realization

The meminductor element is useful just like the memristor element due to the similar kind of hysteresis property found in its transient characteristics. This study presents a floating memelement emulator to realize the dual memelement function (memristor and meminductor) using a VDTA (Voltage Differencing Transconductance Amplifier) and a DO-CCII (Dual Output Second Generation Current Conveyor) based compact circuit configuration. The developed emulator architecture requires only three passive elements (all in the grounded state) with just two active elements to realize the floating meminductor and memristor suitable for both incremental as well as decremental modes of operation. The tuning of the proposed circuit to provide desired memelement behavior realization (memristor or meminductor) can be obtained by selecting an employed grounded impedance as a capacitor and resistor respectively. No use of any floating passive element and external memristor emulator is a remarkable design feature along with the feature of tunability found in the proposed emulator circuit enriching the superiority of its design. The circuit analysis also shows that the selection of the grounded impedance as an inductor can also lead to the realization of a non-linear capacitor, which is the dual of a memcapacitor element. The workability of the presented emulator circuit is validated through the simulations generated for the 0.18μm CMOS technology in the PSPICE environment. The application examples of both the realized floating elements have been presented and verified through the presented simulation results. Also, the reported memelement emulator has been implemented and verified by using commercially available ICs; AD844 and LM13700.

Application of Voltage Difference transconductance Amplifier (VDTA) for realization of analog active filter: Review

The paper reviews the published work for realization of analog signal processing circuits especially filters using VDTA as an active building block. VDTA is new active building block which has been used to realize the filters and other analog signal processing networks. Important advantage of ideal effects of VDTA is also presented. Moreover, various types of active filters employing VDTA is its electronic tuning of transconductance gain. At the outset of this review paper brief account of filters and their application is given. Detailed study including Non-VDTA is also presented.

New resistor-less tunable floating and grounded FDNR simulators

ABSTRACT This article proposes new electronically tunable simulation configurations of synthetic grounded and floating frequency-dependent negative resistances (FDNRs) without using any resistances. The presented simulators have been realised by using two voltage differencing transconductance amplifiers (VDTAs) along with two capacitances. As per the knowledge of the authors, the depicted VDTA-based simulator circuits are the most compact configurations as compared to any other VDTA-based pure FDNR simulator reported so far. The circuits possess the feature of electronic tunability which means that the realised FDNR value can be controlled by using bias currents of employed VDTAs. Moreover, the reported structures simulate ideal FDNR behaviour without any requirement of fulfiling the parameter-related conditions. An analysis has been presented and discussed to find the behaviour of the presented circuits under non-ideal effects. The operation of the simulated FDNRs has been checked by constructing higher-order CDR filters. The working of the designed circuits has been shown through the simulation results generated using PSPICE with 0.18 um CMOS technology. Finally, the experimental results using commercial IC have been discussed.

Floating/grounded series/parallel R-L, R-C and L-C immittance simulators employing VDTAs and only two grounded passive elements

In this paper, four floating/grounded series and parallel immittance simulator topologies are proposed, utilizing voltage differencing transconductance amplifiers (VDTAs) as useful active devices. Each of the proposed topologies requires only two grounded passive components. The floating series and parallel simulated immittance circuits proposed here require just two VDTAs, whilst the grounded ones require only one. The proposed topologies can simulate R-L, R-C, and L-C immittances in series and parallel. All of the simulated equivalent elements for the realized immittances are orthogonal adjustable. Furthermore, there are no critical element equality criteria required for the desired immittance function realization. The behavior of the proposed VDTA-based immittance simulators is exemplified in LC ladder filter and sinusoidal oscillator applications. To illustrate the simulator's performance, PSPICE simulation and experimental test results are used.

New Grounded and Floating Memristor-Less Meminductor Emulators Using VDTA and CDBA

In this paper, new memristor-less meminductor emulators have been proposed using voltage differencing transconductance amplifier (VDTA), current differencing buffered amplifier (CDBA) and a grounded capacitor. The proposed decremental/incremental meminductor emulators have been realized in both grounded and floating types of configurations. In the proposed meminductor emulators, analog multiplier, memristor and passive resistors are not used which result in simpler configurations. The pinched hysteresis loops are maintained up to 2[Formula: see text]MHz for both decremental and incremental configurations of meminductor emulators. The behaviors of decremental and incremental meminductor emulators have been analyzed after applying input pulses. The obtained results verify the performances as decremental and incremental meminductor emulators. The simulation results have been obtained using Mentor Graphics Eldo simulation tool with 180[Formula: see text]nm CMOS technology parameters. To verify the performances of the proposed meminductor emulators, adaptive learning circuit and chaotic oscillator have been designed. The performances of the proposed meminductor emulators are compared with other meminductor emulators reported in the literature.

New electronically adjustable memelement emulator for realizing the behaviour of fully-floating meminductor and memristor

The memelements have gained a significant interest due to the useful hysteresisproperty; they exhibit in their transient characteristics. Based ondifferent pairs of electrical quantities (current, voltage, charge, and flux), they relate, memelements are classified as; memristor, meminductor and memcapacitor respectively. This work proposes a Fully-floating memelement emulator to realize the behaviour of a memristor and meminductor by using the optimum number of circuit resources. This memelement emulator has been designed by using just two VDTAs (Voltage Differencing Transconductance Amplifiers) with only two grounded passive elements. The designed circuit also possesses the feature of electronic tunability, which provides the controllable nature of realized floating inverse meminductance and memconductance. As per the knowledge of the authors, no such compact meminductor emulator has been reported so far, which does not require an external voltage multiplier and owns such useful features. The applicability of the suggested memelement emulator has also been shown for both the realized elements in neural network applications. The simulations have been performedunder PSPICE environment using CMOS technology for verification of the designed circuits. Finally, the commercial IC-based realization of the proposed memelement emulator has been discussed and results have been presented.

CMOS Realization of Fully Electronically Tunable Single Resistance Control Mixed Mode Biquad Filter Employing Single VDTA at ± 0.6V

This paper presents a single VDTA based Mixed Mode type Biquad filter. The proposed Transadmittance Mode (TAM) type Biquad filter configuration employed single voltage differencing transconductance amplifier (VDTA) as an active building block, three passive element namely one grounded resistor, one grounded capacitor and one floating capacitor. The proposed transadmittance Mode multifunction Biquad filter configuration is presenting transadmittance mode type four basic standard filter functions low pass, high pass, band pass, band reject or band stop or band eliminate filter responses. These four type filter responses are realizing simultaneously with the selection of single input voltage signal. The proposed Transadmittance Mode multifunction Biquad filter configuration has more advantageous features such as low active and passive sensitivities, low power supply voltage, low power consumption, low quality factor, very low power consumption, more electronic tunability, higher linearity and required small area of the chip. The performance of the proposed configuration has been verified through PSPICE simulation using 0.18μm CMOS Technology process parameters.

New tunable resistorless grounded meminductor emulator

In this research article, a grounded resistorless meminductor emulator is proposed. The proposed emulator uses one voltage differencing transconductance amplifier (VDTA) and one operational transconductance amplifier (OTA) with corresponding grounded capacitances. It can be operated in both decremental and incremental configurations. The comparison of the proposed emulator with available literature is also included. The proposed meminductor emulator circuit has been designed and simulated in Cadence Virtuoso Analog Design Environment using 180 nm gdpk technology parameters. Moreover, the application of the proposed emulator as a second-order bandpass filter (BPF) is also given. The simulation results agree well with the theory and confirm the meminductor functionality.

Floating Memristor and Inverse Memristor Emulators with Electronic Tuning

The work reports two different configurations to emulate the floating memristor and inverse memristor behavior. The presented circuits are based on a modified concept of active element VDTA (Voltage Differencing Transconductance Amplifier) termed as MVDTA. The reported floating memristor employs only a single MVDTA and single grounded capacitance. On the other end, the floating emulation circuit of inverse memristor emulator is based on two MVDTAs and single grounded capacitance. The behavior of the realized element for both the configurations can be tuned electronically through biasing voltage. Also, there is no employment of any commercial IC or external circuitry for multiplication of analogue voltages which is generally required to implement memristive elements. Along with the circuit implementations, mathematical properties of ideal memristor and inverse memristor considering both symmetric as well as nonsymmetric models are discussed. All the emulation circuits are verified by executing simulations using CMOS 0.18[Formula: see text]um process technique under PSPICE environment. The reported circuits are also realized using commercially available IC LM13700 and results are presented.

Fractional quadrature oscillator using VDTAs with grounded capacitors

In this proposed work, the fractional order quadrature oscillator using voltage differencing trans-conductance amplifier (VDTA) as an active building block is designed. The circuit configuration of VDTA with its characteristics is shown. The expression for the frequency of oscillation is derived. The non-ideal effects and sensitivity of the proposed design for the parasitic components are determined. The stability of the proposed work is analyzed with the help of value and the location of roots of the proposed circuit. The approximation of the fractional order capacitor is done with the help of a single parallel circuit of passive components and General impedance converter. The comparison of the proposed work is done with the existing works. The results of the proposed work are verified using PSPICE with TSMC CMOS 180 nm technology.